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hw/riscv: sifive_gpio: Clean up the codes

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Do various minor clean-ups to the exisiting codes for:

- coding convention conformance
- remove unnecessary blank lines
- spell SiFive correctly

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-6-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-6-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2020-06-08 07:17:34 -07:00 • committed by Alistair Francis
parent ea85f27d41
commit 2e30ccb425
2 changed files with 9 additions and 11 deletions
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13
hw/riscv/sifive_gpio.c
View file

@ -1,5 +1,5 @@
/* /*
* sifive System-on-Chip general purpose input/output register definition * SiFive System-on-Chip general purpose input/output register definition
* *
* Copyright 2019 AdaCore * Copyright 2019 AdaCore
* *
@ -20,7 +20,6 @@
static void update_output_irq(SIFIVEGPIOState *s) static void update_output_irq(SIFIVEGPIOState *s)
{ {
uint32_t pending; uint32_t pending;
uint32_t pin; uint32_t pin;
@ -186,7 +185,7 @@ static uint64_t sifive_gpio_read(void *opaque, hwaddr offset, unsigned int size)
} }
static void sifive_gpio_write(void *opaque, hwaddr offset, static void sifive_gpio_write(void *opaque, hwaddr offset,
uint64_t value, unsigned int size) uint64_t value, unsigned int size)
{ {
SIFIVEGPIOState *s = SIFIVE_GPIO(opaque); SIFIVEGPIOState *s = SIFIVE_GPIO(opaque);
@ -318,7 +317,6 @@ static void sifive_gpio_reset(DeviceState *dev)
s->out_xor = 0; s->out_xor = 0;
s->in = 0; s->in = 0;
s->in_mask = 0; s->in_mask = 0;
} }
static const VMStateDescription vmstate_sifive_gpio = { static const VMStateDescription vmstate_sifive_gpio = {
@ -342,8 +340,8 @@ static const VMStateDescription vmstate_sifive_gpio = {
VMSTATE_UINT32(iof_en, SIFIVEGPIOState), VMSTATE_UINT32(iof_en, SIFIVEGPIOState),
VMSTATE_UINT32(iof_sel, SIFIVEGPIOState), VMSTATE_UINT32(iof_sel, SIFIVEGPIOState),
VMSTATE_UINT32(out_xor, SIFIVEGPIOState), VMSTATE_UINT32(out_xor, SIFIVEGPIOState),
VMSTATE_UINT32(in, SIFIVEGPIOState), VMSTATE_UINT32(in, SIFIVEGPIOState),
VMSTATE_UINT32(in_mask, SIFIVEGPIOState), VMSTATE_UINT32(in_mask, SIFIVEGPIOState),
VMSTATE_END_OF_LIST() VMSTATE_END_OF_LIST()
} }
}; };
@ -356,7 +354,6 @@ static void sifive_gpio_init(Object *obj)
TYPE_SIFIVE_GPIO, SIFIVE_GPIO_SIZE); TYPE_SIFIVE_GPIO, SIFIVE_GPIO_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
for (int i = 0; i < SIFIVE_GPIO_PINS; i++) { for (int i = 0; i < SIFIVE_GPIO_PINS; i++) {
sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq[i]); sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq[i]);
} }
@ -371,7 +368,7 @@ static void sifive_gpio_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_sifive_gpio; dc->vmsd = &vmstate_sifive_gpio;
dc->reset = sifive_gpio_reset; dc->reset = sifive_gpio_reset;
dc->desc = "sifive GPIO"; dc->desc = "SiFive GPIO";
} }
static const TypeInfo sifive_gpio_info = { static const TypeInfo sifive_gpio_info = {

7
include/hw/riscv/sifive_gpio.h
View file

@ -1,5 +1,5 @@
/* /*
* sifive System-on-Chip general purpose input/output register definition * SiFive System-on-Chip general purpose input/output register definition
* *
* Copyright 2019 AdaCore * Copyright 2019 AdaCore
* *
@ -10,10 +10,12 @@
* This code is licensed under the GPL version 2 or later. See * This code is licensed under the GPL version 2 or later. See
* the COPYING file in the top-level directory. * the COPYING file in the top-level directory.
*/ */
#ifndef SIFIVE_GPIO_H #ifndef SIFIVE_GPIO_H
#define SIFIVE_GPIO_H #define SIFIVE_GPIO_H
#include "hw/sysbus.h" #include "hw/sysbus.h"
#define TYPE_SIFIVE_GPIO "sifive_soc.gpio" #define TYPE_SIFIVE_GPIO "sifive_soc.gpio"
#define SIFIVE_GPIO(obj) OBJECT_CHECK(SIFIVEGPIOState, (obj), TYPE_SIFIVE_GPIO) #define SIFIVE_GPIO(obj) OBJECT_CHECK(SIFIVEGPIOState, (obj), TYPE_SIFIVE_GPIO)
@ -66,7 +68,6 @@ typedef struct SIFIVEGPIOState {
uint32_t out_xor; uint32_t out_xor;
uint32_t in; uint32_t in;
uint32_t in_mask; uint32_t in_mask;
} SIFIVEGPIOState; } SIFIVEGPIOState;
#endif #endif /* SIFIVE_GPIO_H */