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https://github.com/Motorhead1991/qemu.git
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-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1 iQIcBAABAgAGBQJVcf+LAAoJEH3vgQaq/DkOMGYP/i/LxItDxCgfi+n6a1TIhgvs shp6FkatH50f0b4EoimmMhZJWZBU9GoTgNhULgreTm0fgv9d87ciFkabUZhJLO7e Sck+qMJYUpdB6goyVFC3efq7LpuwoGGBhekiQjMBe/a0f64BlYi8tL6hLpN/K3Cu i51ASrAD0rJvp58xAX9/Tgsopi8+++FPaOQzpUL81Zz6z6AGACkpepTndgxkt5DA +s5KHIod0+pUDVa6wjLxA3cWUPx8nA9emoRwl1eu98bwVPa/DX+TAa5ubLliIHtG CGwGZ97W0fHufmZbSCaCYsaHrRVKLBpmGQNorsZVcV/053yW8o5GKFcXMlH797sb dzcNvKPkHNlPJdPgU5akGeEtufesSWDqErOtlruoxR5HmBNHVkB4zFFpovAtrfGY YbpjrYk87W9OixQWOW6toHG3gE87jZnxj3GAIlWqJh1vSVqWWC2PNZTFqtQPu3lp gu3fv3kaa/EbLujmlfq6uD4MFQZlYjJG6JelLydLdimTnr/ad43vABbXGfgaDKAT X++CN9tst0hiuj3n/dJcDkox//U+yCbnPRk00H1bjT//YYJULtCeZk7Y0hVaB5mZ 36PrTAK2FlTZ5caK7KrEtwzsRL4b61mrhzFi7E+Gd31wEiZA30fDu16sX0f+8+ex BqwG0voyXrQp1yx+M8cH =TBeO -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging # gpg: Signature made Fri Jun 5 20:59:07 2015 BST using RSA key ID AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jnsnow/tags/ide-pull-request: macio: remove remainder_len DBDMA_io property macio: update comment/constants to reflect the new code macio: switch pmac_dma_write() over to new offset/len implementation macio: switch pmac_dma_read() over to new offset/len implementation fdc-test: Test state for existing cases more thoroughly fdc: Fix MSR.RQM flag fdc: Disentangle phases in fdctrl_read_data() fdc: Code cleanup in fdctrl_write_data() fdc: Use phase in fdctrl_write_data() fdc: Introduce fdctrl->phase fdc: Rename fdctrl_set_fifo() to fdctrl_to_result_phase() fdc: Rename fdctrl_reset_fifo() to fdctrl_to_command_phase() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
2e29dd7c44
4 changed files with 364 additions and 253 deletions
281
hw/ide/macio.c
281
hw/ide/macio.c
|
@ -51,8 +51,15 @@ static const int debug_macio = 0;
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#define MACIO_PAGE_SIZE 4096
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/*
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* Unaligned DMA read/write access functions required for OS X/Darwin which
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* don't perform DMA transactions on sector boundaries. These functions are
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* modelled on bdrv_co_do_preadv()/bdrv_co_do_pwritev() and so should be
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* easy to remove if the unaligned block APIs are ever exposed.
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*/
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static void pmac_dma_read(BlockBackend *blk,
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int64_t sector_num, int nb_sectors,
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int64_t offset, unsigned int bytes,
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void (*cb)(void *opaque, int ret), void *opaque)
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{
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DBDMA_io *io = opaque;
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@ -60,76 +67,48 @@ static void pmac_dma_read(BlockBackend *blk,
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IDEState *s = idebus_active_if(&m->bus);
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dma_addr_t dma_addr, dma_len;
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void *mem;
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int nsector, remainder;
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int64_t sector_num;
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int nsector;
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uint64_t align = BDRV_SECTOR_SIZE;
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size_t head_bytes, tail_bytes;
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qemu_iovec_destroy(&io->iov);
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qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1);
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if (io->remainder_len > 0) {
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/* Return remainder of request */
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int transfer = MIN(io->remainder_len, io->len);
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sector_num = (offset >> 9);
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nsector = (io->len >> 9);
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MACIO_DPRINTF("--- DMA read pop - bounce addr: %p addr: %"
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HWADDR_PRIx " remainder_len: %x\n",
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&io->remainder + (0x200 - transfer), io->addr,
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io->remainder_len);
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cpu_physical_memory_write(io->addr,
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&io->remainder + (0x200 - transfer),
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transfer);
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io->remainder_len -= transfer;
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io->len -= transfer;
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io->addr += transfer;
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s->io_buffer_index += transfer;
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s->io_buffer_size -= transfer;
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if (io->remainder_len != 0) {
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/* Still waiting for remainder */
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return;
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}
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if (io->len == 0) {
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MACIO_DPRINTF("--- finished all read processing; go and finish\n");
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cb(opaque, 0);
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return;
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}
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}
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if (s->drive_kind == IDE_CD) {
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sector_num = (int64_t)(s->lba << 2) + (s->io_buffer_index >> 9);
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} else {
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sector_num = ide_get_sector(s) + (s->io_buffer_index >> 9);
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}
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nsector = ((io->len + 0x1ff) >> 9);
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remainder = (nsector << 9) - io->len;
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MACIO_DPRINTF("--- DMA read transfer - addr: %" HWADDR_PRIx " len: %x\n",
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io->addr, io->len);
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MACIO_DPRINTF("--- DMA read transfer (0x%" HWADDR_PRIx ",0x%x): "
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"sector_num: %" PRId64 ", nsector: %d\n", io->addr, io->len,
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sector_num, nsector);
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dma_addr = io->addr;
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dma_len = io->len;
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mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len,
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DMA_DIRECTION_FROM_DEVICE);
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if (!remainder) {
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MACIO_DPRINTF("--- DMA read aligned - addr: %" HWADDR_PRIx
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" len: %x\n", io->addr, io->len);
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qemu_iovec_add(&io->iov, mem, io->len);
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} else {
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MACIO_DPRINTF("--- DMA read unaligned - addr: %" HWADDR_PRIx
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" len: %x\n", io->addr, io->len);
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qemu_iovec_add(&io->iov, mem, io->len);
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if (offset & (align - 1)) {
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head_bytes = offset & (align - 1);
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MACIO_DPRINTF("--- DMA read push - bounce addr: %p "
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"remainder_len: %x\n",
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&io->remainder + 0x200 - remainder, remainder);
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qemu_iovec_add(&io->iov, &io->remainder + 0x200 - remainder,
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remainder);
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MACIO_DPRINTF("--- DMA unaligned head: sector %" PRId64 ", "
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"discarding %zu bytes\n", sector_num, head_bytes);
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io->remainder_len = remainder;
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qemu_iovec_add(&io->iov, &io->head_remainder, head_bytes);
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bytes += offset & (align - 1);
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offset = offset & ~(align - 1);
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}
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qemu_iovec_add(&io->iov, mem, io->len);
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if ((offset + bytes) & (align - 1)) {
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tail_bytes = (offset + bytes) & (align - 1);
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MACIO_DPRINTF("--- DMA unaligned tail: sector %" PRId64 ", "
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"discarding bytes %zu\n", sector_num, tail_bytes);
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qemu_iovec_add(&io->iov, &io->tail_remainder, align - tail_bytes);
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bytes = ROUND_UP(bytes, align);
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}
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s->io_buffer_size -= io->len;
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@ -137,15 +116,15 @@ static void pmac_dma_read(BlockBackend *blk,
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io->len = 0;
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MACIO_DPRINTF("--- Block read transfer - sector_num: %"PRIx64" "
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"nsector: %x\n",
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sector_num, nsector);
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MACIO_DPRINTF("--- Block read transfer - sector_num: %" PRIx64 " "
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"nsector: %x\n", (offset >> 9), (bytes >> 9));
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m->aiocb = blk_aio_readv(blk, sector_num, &io->iov, nsector, cb, io);
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m->aiocb = blk_aio_readv(blk, (offset >> 9), &io->iov, (bytes >> 9),
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cb, io);
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}
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static void pmac_dma_write(BlockBackend *blk,
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int64_t sector_num, int nb_sectors,
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int64_t offset, int bytes,
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void (*cb)(void *opaque, int ret), void *opaque)
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{
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DBDMA_io *io = opaque;
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@ -153,53 +132,20 @@ static void pmac_dma_write(BlockBackend *blk,
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IDEState *s = idebus_active_if(&m->bus);
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dma_addr_t dma_addr, dma_len;
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void *mem;
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int nsector, remainder;
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int extra = 0;
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int64_t sector_num;
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int nsector;
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uint64_t align = BDRV_SECTOR_SIZE;
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size_t head_bytes, tail_bytes;
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bool unaligned_head = false, unaligned_tail = false;
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qemu_iovec_destroy(&io->iov);
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qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1);
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if (io->remainder_len > 0) {
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/* Return remainder of request */
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int transfer = MIN(io->remainder_len, io->len);
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MACIO_DPRINTF("--- processing write remainder %x\n", transfer);
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cpu_physical_memory_read(io->addr,
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&io->remainder + (0x200 - transfer),
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transfer);
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io->remainder_len -= transfer;
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io->len -= transfer;
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io->addr += transfer;
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s->io_buffer_index += transfer;
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s->io_buffer_size -= transfer;
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if (io->remainder_len != 0) {
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/* Still waiting for remainder */
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return;
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}
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MACIO_DPRINTF("--> prepending bounce buffer with size 0x200\n");
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/* Sector transfer complete - prepend to request */
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qemu_iovec_add(&io->iov, &io->remainder, 0x200);
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extra = 1;
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}
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if (s->drive_kind == IDE_CD) {
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sector_num = (int64_t)(s->lba << 2) + (s->io_buffer_index >> 9);
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} else {
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sector_num = ide_get_sector(s) + (s->io_buffer_index >> 9);
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}
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sector_num = (offset >> 9);
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nsector = (io->len >> 9);
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remainder = io->len - (nsector << 9);
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MACIO_DPRINTF("--- DMA write transfer - addr: %" HWADDR_PRIx " len: %x\n",
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io->addr, io->len);
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MACIO_DPRINTF("xxx remainder: %x\n", remainder);
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MACIO_DPRINTF("xxx sector_num: %"PRIx64" nsector: %x\n",
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MACIO_DPRINTF("--- DMA write transfer (0x%" HWADDR_PRIx ",0x%x): "
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"sector_num: %" PRId64 ", nsector: %d\n", io->addr, io->len,
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sector_num, nsector);
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dma_addr = io->addr;
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@ -207,36 +153,59 @@ static void pmac_dma_write(BlockBackend *blk,
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mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len,
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DMA_DIRECTION_TO_DEVICE);
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if (!remainder) {
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MACIO_DPRINTF("--- DMA write aligned - addr: %" HWADDR_PRIx
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" len: %x\n", io->addr, io->len);
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if (offset & (align - 1)) {
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head_bytes = offset & (align - 1);
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sector_num = ((offset & ~(align - 1)) >> 9);
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MACIO_DPRINTF("--- DMA unaligned head: pre-reading head sector %"
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PRId64 "\n", sector_num);
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blk_pread(s->blk, (sector_num << 9), &io->head_remainder, align);
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qemu_iovec_add(&io->iov, &io->head_remainder, head_bytes);
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qemu_iovec_add(&io->iov, mem, io->len);
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} else {
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/* Write up to last complete sector */
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MACIO_DPRINTF("--- DMA write unaligned - addr: %" HWADDR_PRIx
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" len: %x\n", io->addr, (nsector << 9));
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qemu_iovec_add(&io->iov, mem, (nsector << 9));
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MACIO_DPRINTF("--- DMA write read - bounce addr: %p "
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"remainder_len: %x\n", &io->remainder, remainder);
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cpu_physical_memory_read(io->addr + (nsector << 9), &io->remainder,
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remainder);
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bytes += offset & (align - 1);
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offset = offset & ~(align - 1);
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io->remainder_len = 0x200 - remainder;
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MACIO_DPRINTF("xxx remainder_len: %x\n", io->remainder_len);
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unaligned_head = true;
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}
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s->io_buffer_size -= ((nsector + extra) << 9);
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s->io_buffer_index += ((nsector + extra) << 9);
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if ((offset + bytes) & (align - 1)) {
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tail_bytes = (offset + bytes) & (align - 1);
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sector_num = (((offset + bytes) & ~(align - 1)) >> 9);
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MACIO_DPRINTF("--- DMA unaligned tail: pre-reading tail sector %"
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PRId64 "\n", sector_num);
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blk_pread(s->blk, (sector_num << 9), &io->tail_remainder, align);
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if (!unaligned_head) {
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qemu_iovec_add(&io->iov, mem, io->len);
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}
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qemu_iovec_add(&io->iov, &io->tail_remainder + tail_bytes,
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align - tail_bytes);
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bytes = ROUND_UP(bytes, align);
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unaligned_tail = true;
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}
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if (!unaligned_head && !unaligned_tail) {
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qemu_iovec_add(&io->iov, mem, io->len);
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}
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s->io_buffer_size -= io->len;
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s->io_buffer_index += io->len;
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io->len = 0;
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MACIO_DPRINTF("--- Block write transfer - sector_num: %"PRIx64" "
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"nsector: %x\n", sector_num, nsector + extra);
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MACIO_DPRINTF("--- Block write transfer - sector_num: %" PRIx64 " "
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"nsector: %x\n", (offset >> 9), (bytes >> 9));
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|
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m->aiocb = blk_aio_writev(blk, sector_num, &io->iov, nsector + extra, cb,
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io);
|
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m->aiocb = blk_aio_writev(blk, (offset >> 9), &io->iov, (bytes >> 9),
|
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cb, io);
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}
|
||||
|
||||
static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
|
||||
|
@ -244,19 +213,12 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
|
|||
DBDMA_io *io = opaque;
|
||||
MACIOIDEState *m = io->opaque;
|
||||
IDEState *s = idebus_active_if(&m->bus);
|
||||
int64_t sector_num;
|
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int nsector, remainder;
|
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int64_t offset;
|
||||
|
||||
MACIO_DPRINTF("\ns is %p\n", s);
|
||||
MACIO_DPRINTF("io_buffer_index: %x\n", s->io_buffer_index);
|
||||
MACIO_DPRINTF("io_buffer_size: %x packet_transfer_size: %x\n",
|
||||
s->io_buffer_size, s->packet_transfer_size);
|
||||
MACIO_DPRINTF("lba: %x\n", s->lba);
|
||||
MACIO_DPRINTF("io_addr: %" HWADDR_PRIx " io_len: %x\n", io->addr,
|
||||
io->len);
|
||||
MACIO_DPRINTF("pmac_ide_atapi_transfer_cb\n");
|
||||
|
||||
if (ret < 0) {
|
||||
MACIO_DPRINTF("THERE WAS AN ERROR! %d\n", ret);
|
||||
MACIO_DPRINTF("DMA error: %d\n", ret);
|
||||
ide_atapi_io_error(s, ret);
|
||||
goto done;
|
||||
}
|
||||
|
@ -270,6 +232,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
|
|||
}
|
||||
|
||||
if (s->io_buffer_size <= 0) {
|
||||
MACIO_DPRINTF("End of IDE transfer\n");
|
||||
ide_atapi_cmd_ok(s);
|
||||
m->dma_active = false;
|
||||
goto done;
|
||||
|
@ -289,19 +252,13 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
|
|||
goto done;
|
||||
}
|
||||
|
||||
/* Calculate number of sectors */
|
||||
sector_num = (int64_t)(s->lba << 2) + (s->io_buffer_index >> 9);
|
||||
nsector = (io->len + 0x1ff) >> 9;
|
||||
remainder = io->len & 0x1ff;
|
||||
/* Calculate current offset */
|
||||
offset = (int64_t)(s->lba << 11) + s->io_buffer_index;
|
||||
|
||||
MACIO_DPRINTF("nsector: %d remainder: %x\n", nsector, remainder);
|
||||
MACIO_DPRINTF("sector: %"PRIx64" %zx\n", sector_num, io->iov.size / 512);
|
||||
|
||||
pmac_dma_read(s->blk, sector_num, nsector, pmac_ide_atapi_transfer_cb, io);
|
||||
pmac_dma_read(s->blk, offset, io->len, pmac_ide_atapi_transfer_cb, io);
|
||||
return;
|
||||
|
||||
done:
|
||||
MACIO_DPRINTF("done DMA\n\n");
|
||||
block_acct_done(blk_get_stats(s->blk), &s->acct);
|
||||
io->dma_end(opaque);
|
||||
|
||||
|
@ -313,16 +270,14 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
|
|||
DBDMA_io *io = opaque;
|
||||
MACIOIDEState *m = io->opaque;
|
||||
IDEState *s = idebus_active_if(&m->bus);
|
||||
int64_t sector_num;
|
||||
int nsector, remainder;
|
||||
int64_t offset;
|
||||
|
||||
MACIO_DPRINTF("pmac_ide_transfer_cb\n");
|
||||
|
||||
if (ret < 0) {
|
||||
MACIO_DPRINTF("DMA error\n");
|
||||
MACIO_DPRINTF("DMA error: %d\n", ret);
|
||||
m->aiocb = NULL;
|
||||
ide_dma_error(s);
|
||||
io->remainder_len = 0;
|
||||
goto done;
|
||||
}
|
||||
|
||||
|
@ -335,7 +290,7 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
|
|||
}
|
||||
|
||||
if (s->io_buffer_size <= 0) {
|
||||
MACIO_DPRINTF("end of transfer\n");
|
||||
MACIO_DPRINTF("End of IDE transfer\n");
|
||||
s->status = READY_STAT | SEEK_STAT;
|
||||
ide_set_irq(s->bus);
|
||||
m->dma_active = false;
|
||||
|
@ -348,24 +303,16 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
|
|||
}
|
||||
|
||||
/* Calculate number of sectors */
|
||||
sector_num = ide_get_sector(s) + (s->io_buffer_index >> 9);
|
||||
nsector = (io->len + 0x1ff) >> 9;
|
||||
remainder = io->len & 0x1ff;
|
||||
|
||||
s->nsector -= nsector;
|
||||
|
||||
MACIO_DPRINTF("nsector: %d remainder: %x\n", nsector, remainder);
|
||||
MACIO_DPRINTF("sector: %"PRIx64" %x\n", sector_num, nsector);
|
||||
offset = (ide_get_sector(s) << 9) + s->io_buffer_index;
|
||||
|
||||
switch (s->dma_cmd) {
|
||||
case IDE_DMA_READ:
|
||||
pmac_dma_read(s->blk, sector_num, nsector, pmac_ide_transfer_cb, io);
|
||||
pmac_dma_read(s->blk, offset, io->len, pmac_ide_transfer_cb, io);
|
||||
break;
|
||||
case IDE_DMA_WRITE:
|
||||
pmac_dma_write(s->blk, sector_num, nsector, pmac_ide_transfer_cb, io);
|
||||
pmac_dma_write(s->blk, offset, io->len, pmac_ide_transfer_cb, io);
|
||||
break;
|
||||
case IDE_DMA_TRIM:
|
||||
MACIO_DPRINTF("TRIM command issued!");
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -561,15 +508,12 @@ static void ide_dbdma_start(IDEDMA *dma, IDEState *s,
|
|||
BlockCompletionFunc *cb)
|
||||
{
|
||||
MACIOIDEState *m = container_of(dma, MACIOIDEState, dma);
|
||||
DBDMAState *dbdma = m->dbdma;
|
||||
DBDMA_io *io;
|
||||
int i;
|
||||
|
||||
s->io_buffer_index = 0;
|
||||
if (s->drive_kind == IDE_CD) {
|
||||
s->io_buffer_size = s->packet_transfer_size;
|
||||
} else {
|
||||
s->io_buffer_size = s->nsector * 0x200;
|
||||
s->io_buffer_size = s->nsector * BDRV_SECTOR_SIZE;
|
||||
}
|
||||
|
||||
MACIO_DPRINTF("\n\n------------ IDE transfer\n");
|
||||
|
@ -578,15 +522,6 @@ static void ide_dbdma_start(IDEDMA *dma, IDEState *s,
|
|||
MACIO_DPRINTF("lba: %x size: %x\n", s->lba, s->io_buffer_size);
|
||||
MACIO_DPRINTF("-------------------------\n");
|
||||
|
||||
for (i = 0; i < DBDMA_CHANNELS; i++) {
|
||||
io = &dbdma->channels[i].io;
|
||||
|
||||
if (io->opaque == m) {
|
||||
io->remainder_len = 0;
|
||||
}
|
||||
}
|
||||
|
||||
MACIO_DPRINTF("\n");
|
||||
m->dma_active = true;
|
||||
DBDMA_kick(m->dbdma);
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue