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Compile serial only once
Push TARGET_WORDS_BIGENDIAN dependency to board level. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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parent
d3ffc7a6e7
commit
2d48377a85
27 changed files with 183 additions and 62 deletions
92
hw/serial.c
92
hw/serial.c
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@ -825,65 +825,106 @@ static void serial_mm_writeb(void *opaque, target_phys_addr_t addr,
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serial_ioport_write(s, addr >> s->it_shift, value & 0xFF);
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}
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static uint32_t serial_mm_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr)
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{
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SerialState *s = opaque;
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uint32_t val;
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val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap16(val);
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#endif
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return val;
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}
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static void serial_mm_writew(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr)
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{
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SerialState *s = opaque;
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#ifdef TARGET_WORDS_BIGENDIAN
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uint32_t val;
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val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
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return val;
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}
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static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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SerialState *s = opaque;
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value = bswap16(value);
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#endif
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serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
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}
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static uint32_t serial_mm_readl(void *opaque, target_phys_addr_t addr)
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static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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SerialState *s = opaque;
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serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
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}
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static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr)
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{
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SerialState *s = opaque;
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uint32_t val;
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val = serial_ioport_read(s, addr >> s->it_shift);
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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return val;
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}
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static void serial_mm_writel(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr)
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{
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SerialState *s = opaque;
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#ifdef TARGET_WORDS_BIGENDIAN
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uint32_t val;
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val = serial_ioport_read(s, addr >> s->it_shift);
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return val;
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}
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static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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SerialState *s = opaque;
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value = bswap32(value);
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#endif
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serial_ioport_write(s, addr >> s->it_shift, value);
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}
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static CPUReadMemoryFunc * const serial_mm_read[] = {
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static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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SerialState *s = opaque;
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serial_ioport_write(s, addr >> s->it_shift, value);
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}
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static CPUReadMemoryFunc * const serial_mm_read_be[] = {
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&serial_mm_readb,
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&serial_mm_readw,
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&serial_mm_readl,
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&serial_mm_readw_be,
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&serial_mm_readl_be,
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};
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static CPUWriteMemoryFunc * const serial_mm_write[] = {
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static CPUWriteMemoryFunc * const serial_mm_write_be[] = {
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&serial_mm_writeb,
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&serial_mm_writew,
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&serial_mm_writel,
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&serial_mm_writew_be,
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&serial_mm_writel_be,
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};
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static CPUReadMemoryFunc * const serial_mm_read_le[] = {
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&serial_mm_readb,
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&serial_mm_readw_le,
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&serial_mm_readl_le,
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};
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static CPUWriteMemoryFunc * const serial_mm_write_le[] = {
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&serial_mm_writeb,
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&serial_mm_writew_le,
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&serial_mm_writel_le,
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};
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SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
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qemu_irq irq, int baudbase,
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CharDriverState *chr, int ioregister)
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CharDriverState *chr, int ioregister,
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int be)
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{
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SerialState *s;
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int s_io_memory;
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@ -899,8 +940,13 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
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vmstate_register(base, &vmstate_serial, s);
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if (ioregister) {
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s_io_memory = cpu_register_io_memory(serial_mm_read,
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serial_mm_write, s);
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if (be) {
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s_io_memory = cpu_register_io_memory(serial_mm_read_be,
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serial_mm_write_be, s);
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} else {
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s_io_memory = cpu_register_io_memory(serial_mm_read_le,
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serial_mm_write_le, s);
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}
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cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
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}
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serial_update_msl(s);
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