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Use qemu_irq for a reset signal between DMA and ESP/Lance

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3120 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2007-08-16 19:56:27 +00:00
parent 52da07d1af
commit 2d069bab6a
5 changed files with 37 additions and 26 deletions
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13
hw/sun4m.c
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@ -315,6 +315,7 @@ static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
const sparc_def_t *def;
qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq,
*espdma_irq, *ledma_irq;
qemu_irq *esp_reset, *le_reset;
/* init CPUs */
sparc_find_by_name(cpu_model, &def);
@ -352,9 +353,11 @@ static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
hwdef->clock_irq);
espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq],
iommu, &espdma_irq);
iommu, &espdma_irq, &esp_reset);
ledma = sparc32_dma_init(hwdef->dma_base + 16ULL,
slavio_irq[hwdef->le_irq], iommu, &ledma_irq);
slavio_irq[hwdef->le_irq], iommu, &ledma_irq,
&le_reset);
if (graphic_depth != 8 && graphic_depth != 24) {
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
@ -365,7 +368,7 @@ static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
if (nd_table[0].model == NULL
|| strcmp(nd_table[0].model, "lance") == 0) {
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq);
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: lance\n");
exit (1);
@ -389,7 +392,9 @@ static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
serial_hds[1], serial_hds[0]);
fdctrl_init(slavio_irq[hwdef->fd_irq], 0, 1, hwdef->fd_base, fd_table);
main_esp = esp_init(bs_table, hwdef->esp_base, espdma, *espdma_irq);
main_esp = esp_init(bs_table, hwdef->esp_base, espdma, *espdma_irq,
esp_reset);
for (i = 0; i < MAX_DISKS; i++) {
if (bs_table[i]) {