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memory: add owner argument to initialization functions

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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2013-06-06 05:41:28 -04:00
parent 5767e4e198
commit 2c9b15cab1
319 changed files with 787 additions and 759 deletions
Download patch file Download diff file Expand all files Collapse all files

2
hw/dma/etraxfs_dma.c
View file

@ -773,7 +773,7 @@ void *etraxfs_dmac_init(hwaddr base, int nr_channels)
ctrl->nr_channels = nr_channels;
ctrl->channels = g_malloc0(sizeof ctrl->channels[0] * nr_channels);
memory_region_init_io(&ctrl->mmio, &dma_ops, ctrl, "etraxfs-dma",
memory_region_init_io(&ctrl->mmio, NULL, &dma_ops, ctrl, "etraxfs-dma",
nr_channels * 0x2000);
memory_region_add_subregion(get_system_memory(), base, &ctrl->mmio);

4
hw/dma/i8257.c
View file

@ -523,7 +523,7 @@ static void dma_init2(struct dma_cont *d, int base, int dshift,
d->dshift = dshift;
d->cpu_request_exit = cpu_request_exit;
memory_region_init_io(&d->channel_io, &channel_io_ops, d,
memory_region_init_io(&d->channel_io, NULL, &channel_io_ops, d,
"dma-chan", 8 << d->dshift);
memory_region_add_subregion(isa_address_space_io(NULL),
base, &d->channel_io);
@ -535,7 +535,7 @@ static void dma_init2(struct dma_cont *d, int base, int dshift,
"dma-pageh");
}
memory_region_init_io(&d->cont_io, &cont_io_ops, d, "dma-cont",
memory_region_init_io(&d->cont_io, NULL, &cont_io_ops, d, "dma-cont",
8 << d->dshift);
memory_region_add_subregion(isa_address_space_io(NULL),
base + (8 << d->dshift), &d->cont_io);

4
hw/dma/omap_dma.c
View file

@ -1663,7 +1663,7 @@ struct soc_dma_s *omap_dma_init(hwaddr base, qemu_irq *irqs,
omap_dma_reset(s->dma);
omap_dma_clk_update(s, 0, 1);
memory_region_init_io(&s->iomem, &omap_dma_ops, s, "omap.dma", memsize);
memory_region_init_io(&s->iomem, NULL, &omap_dma_ops, s, "omap.dma", memsize);
memory_region_add_subregion(sysmem, base, &s->iomem);
mpu->drq = s->dma->drq;
@ -2085,7 +2085,7 @@ struct soc_dma_s *omap_dma4_init(hwaddr base, qemu_irq *irqs,
omap_dma_reset(s->dma);
omap_dma_clk_update(s, 0, !!s->dma->freq);
memory_region_init_io(&s->iomem, &omap_dma4_ops, s, "omap.dma4", 0x1000);
memory_region_init_io(&s->iomem, NULL, &omap_dma4_ops, s, "omap.dma4", 0x1000);
memory_region_add_subregion(sysmem, base, &s->iomem);
mpu->drq = s->dma->drq;

2
hw/dma/pl080.c
View file

@ -359,7 +359,7 @@ static int pl08x_init(SysBusDevice *dev, int nchannels)
{
pl080_state *s = FROM_SYSBUS(pl080_state, dev);
memory_region_init_io(&s->iomem, &pl080_ops, s, "pl080", 0x1000);
memory_region_init_io(&s->iomem, NULL, &pl080_ops, s, "pl080", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->nchannels = nchannels;

2
hw/dma/pl330.c
View file

@ -1528,7 +1528,7 @@ static void pl330_realize(DeviceState *dev, Error **errp)
PL330State *s = PL330(dev);
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq_abort);
memory_region_init_io(&s->iomem, &pl330_ops, s, "dma", PL330_IOMEM_SIZE);
memory_region_init_io(&s->iomem, NULL, &pl330_ops, s, "dma", PL330_IOMEM_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
s->timer = qemu_new_timer_ns(vm_clock, pl330_exec_cycle_timer, s);

2
hw/dma/puv3_dma.c
View file

@ -80,7 +80,7 @@ static int puv3_dma_init(SysBusDevice *dev)
s->reg_CFG[i] = 0x0;
}
memory_region_init_io(&s->iomem, &puv3_dma_ops, s, "puv3_dma",
memory_region_init_io(&s->iomem, NULL, &puv3_dma_ops, s, "puv3_dma",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);

2
hw/dma/pxa2xx_dma.c
View file

@ -465,7 +465,7 @@ static int pxa2xx_dma_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, pxa2xx_dma_request, PXA2XX_DMA_NUM_REQUESTS);
memory_region_init_io(&s->iomem, &pxa2xx_dma_ops, s,
memory_region_init_io(&s->iomem, NULL, &pxa2xx_dma_ops, s,
"pxa2xx.dma", 0x00010000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);

4
hw/dma/rc4030.c
View file

@ -814,10 +814,10 @@ void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s);
rc4030_reset(s);
memory_region_init_io(&s->iomem_chipset, &rc4030_ops, s,
memory_region_init_io(&s->iomem_chipset, NULL, &rc4030_ops, s,
"rc4030.chipset", 0x300);
memory_region_add_subregion(sysmem, 0x80000000, &s->iomem_chipset);
memory_region_init_io(&s->iomem_jazzio, &jazzio_ops, s,
memory_region_init_io(&s->iomem_jazzio, NULL, &jazzio_ops, s,
"rc4030.jazzio", 0x00001000);
memory_region_add_subregion(sysmem, 0xf0000000, &s->iomem_jazzio);

2
hw/dma/sparc32_dma.c
View file

@ -274,7 +274,7 @@ static int sparc32_dma_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
memory_region_init_io(&s->iomem, &dma_mem_ops, s, "dma", reg_size);
memory_region_init_io(&s->iomem, NULL, &dma_mem_ops, s, "dma", reg_size);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);

2
hw/dma/sun4m_iommu.c
View file

@ -349,7 +349,7 @@ static int iommu_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &iommu_mem_ops, s, "iommu",
memory_region_init_io(&s->iomem, NULL, &iommu_mem_ops, s, "iommu",
IOMMU_NREGS * sizeof(uint32_t));
sysbus_init_mmio(dev, &s->iomem);

2
hw/dma/xilinx_axidma.c
View file

@ -590,7 +590,7 @@ static void xilinx_axidma_init(Object *obj)
sysbus_init_irq(sbd, &s->streams[0].irq);
sysbus_init_irq(sbd, &s->streams[1].irq);
memory_region_init_io(&s->iomem, &axidma_ops, s,
memory_region_init_io(&s->iomem, NULL, &axidma_ops, s,
"xlnx.axi-dma", R_MAX * 4 * 2);
sysbus_init_mmio(sbd, &s->iomem);
}