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target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled

Browse source 
This is in preparation to moving the hflags code into its own file
under the tcg/ directory.

Signed-off-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Fabiano Rosas 2023-02-17 17:11:32 -03:00 • committed by Peter Maydell
parent 9def656e7a
commit 2b77ad4de6
6 changed files with 42 additions and 17 deletions
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7
target/arm/arm-powerctl.c
View file

@ -15,6 +15,7 @@
#include "arm-powerctl.h"
#include "qemu/log.h"
#include "qemu/main-loop.h"
#include "sysemu/tcg.h"
#ifndef DEBUG_ARM_POWERCTL
#define DEBUG_ARM_POWERCTL 0
@ -127,8 +128,10 @@ static void arm_set_cpu_on_async_work(CPUState *target_cpu_state,
target_cpu->env.regs[0] = info->context_id;
}
/* CP15 update requires rebuilding hflags */
arm_rebuild_hflags(&target_cpu->env);
if (tcg_enabled()) {
/* CP15 update requires rebuilding hflags */
arm_rebuild_hflags(&target_cpu->env);
}
/* Start the new CPU at the requested address */
cpu_set_pc(target_cpu_state, info->entry);

3
target/arm/cpu.c
View file

@ -542,8 +542,9 @@ static void arm_cpu_reset_hold(Object *obj)
if (tcg_enabled()) {
hw_breakpoint_update_all(cpu);
hw_watchpoint_update_all(cpu);
arm_rebuild_hflags(env);
}
arm_rebuild_hflags(env);
}
#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)

18
target/arm/helper.c
View file

@ -5173,7 +5173,7 @@ static void sctlr_write(CPUARMState *env, const ARMCPRegInfo *ri,
/* This may enable/disable the MMU, so do a TLB flush. */
tlb_flush(CPU(cpu));
if (ri->type & ARM_CP_SUPPRESS_TB_END) {
if (tcg_enabled() && ri->type & ARM_CP_SUPPRESS_TB_END) {
/*
* Normally we would always end the TB on an SCTLR write; see the
* comment in ARMCPRegInfo sctlr initialization below for why Xscale
@ -6841,7 +6841,9 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
memset(env->zarray, 0, sizeof(env->zarray));
}
arm_rebuild_hflags(env);
if (tcg_enabled()) {
arm_rebuild_hflags(env);
}
}
static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
@ -9886,7 +9888,7 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask,
}
mask &= ~CACHED_CPSR_BITS;
env->uncached_cpsr = (env->uncached_cpsr & ~mask) | (val & mask);
if (rebuild_hflags) {
if (tcg_enabled() && rebuild_hflags) {
arm_rebuild_hflags(env);
}
}
@ -10445,7 +10447,10 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode,
env->regs[14] = env->regs[15] + offset;
}
env->regs[15] = newpc;
arm_rebuild_hflags(env);
if (tcg_enabled()) {
arm_rebuild_hflags(env);
}
}
static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs)
@ -11001,7 +11006,10 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
pstate_write(env, PSTATE_DAIF | new_mode);
env->aarch64 = true;
aarch64_restore_sp(env, new_el);
helper_rebuild_hflags_a64(env, new_el);
if (tcg_enabled()) {
helper_rebuild_hflags_a64(env, new_el);
}
env->pc = addr;

5
target/arm/machine.c
View file

@ -871,7 +871,10 @@ static int cpu_post_load(void *opaque, int version_id)
if (!kvm_enabled()) {
pmu_op_finish(&cpu->env);
}
arm_rebuild_hflags(&cpu->env);
if (tcg_enabled()) {
arm_rebuild_hflags(&cpu->env);
}
return 0;
}