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apb: use gpios to wire up the apb device to the SPARC CPU IRQs
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
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5 changed files with 18 additions and 10 deletions
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@ -486,7 +486,6 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
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PCIBus *pci_bus, *pci_busA, *pci_busB;
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PCIDevice *ebus, *pci_dev;
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SysBusDevice *s;
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qemu_irq *ivec_irqs;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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DeviceState *dev;
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FWCfgState *fw_cfg;
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@ -502,9 +501,14 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
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prom_init(hwdef->prom_addr, bios_name);
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ivec_irqs = qemu_allocate_irqs(sparc64_cpu_set_ivec_irq, cpu, IVEC_MAX);
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apb = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, ivec_irqs, &pci_busA,
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&pci_busB);
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apb = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, &pci_busA, &pci_busB);
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/* Wire up PCI interrupts to CPU */
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for (i = 0; i < IVEC_MAX; i++) {
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qdev_connect_gpio_out_named(DEVICE(apb), "ivec-irq", i,
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qdev_get_gpio_in_named(DEVICE(cpu), "ivec-irq", i));
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}
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pci_bus = PCI_HOST_BRIDGE(apb)->bus;
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/* Only in-built Simba PBMs can exist on the root bus, slot 0 on busA is
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