mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-14 21:52:18 -06:00
hw/nvme: use prinfo directly in nvme_check_prinfo and nvme_dif_check
The nvme_check_prinfo() and nvme_dif_check() functions operate on the 16 bit "control" member of the NvmeCmd. These functions do not otherwise operate on an NvmeCmd or an NvmeRequest, so change them to expect the actual 4 bit PRINFO field and add constants that work on this field as well. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
This commit is contained in:
parent
189a8bf7f6
commit
2a132309e4
4 changed files with 57 additions and 66 deletions
|
@ -1010,16 +1010,12 @@ static uint16_t nvme_map_data(NvmeCtrl *n, uint32_t nlb, NvmeRequest *req)
|
||||||
{
|
{
|
||||||
NvmeNamespace *ns = req->ns;
|
NvmeNamespace *ns = req->ns;
|
||||||
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
bool pi = !!NVME_ID_NS_DPS_TYPE(ns->id_ns.dps);
|
||||||
|
bool pract = !!(le16_to_cpu(rw->control) & NVME_RW_PRINFO_PRACT);
|
||||||
size_t len = nvme_l2b(ns, nlb);
|
size_t len = nvme_l2b(ns, nlb);
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
|
|
||||||
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) &&
|
if (nvme_ns_ext(ns) && !(pi && pract && ns->lbaf.ms == 8)) {
|
||||||
(ctrl & NVME_RW_PRINFO_PRACT && ns->lbaf.ms == 8)) {
|
|
||||||
goto out;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (nvme_ns_ext(ns)) {
|
|
||||||
NvmeSg sg;
|
NvmeSg sg;
|
||||||
|
|
||||||
len += nvme_m2b(ns, nlb);
|
len += nvme_m2b(ns, nlb);
|
||||||
|
@ -1036,7 +1032,6 @@ static uint16_t nvme_map_data(NvmeCtrl *n, uint32_t nlb, NvmeRequest *req)
|
||||||
return NVME_SUCCESS;
|
return NVME_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
out:
|
|
||||||
return nvme_map_dptr(n, &req->sg, len, &req->cmd);
|
return nvme_map_dptr(n, &req->sg, len, &req->cmd);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1195,10 +1190,10 @@ uint16_t nvme_bounce_data(NvmeCtrl *n, uint8_t *ptr, uint32_t len,
|
||||||
{
|
{
|
||||||
NvmeNamespace *ns = req->ns;
|
NvmeNamespace *ns = req->ns;
|
||||||
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
bool pi = !!NVME_ID_NS_DPS_TYPE(ns->id_ns.dps);
|
||||||
|
bool pract = !!(le16_to_cpu(rw->control) & NVME_RW_PRINFO_PRACT);
|
||||||
|
|
||||||
if (nvme_ns_ext(ns) &&
|
if (nvme_ns_ext(ns) && !(pi && pract && ns->lbaf.ms == 8)) {
|
||||||
!(ctrl & NVME_RW_PRINFO_PRACT && ns->lbaf.ms == 8)) {
|
|
||||||
return nvme_tx_interleaved(n, &req->sg, ptr, len, ns->lbasz,
|
return nvme_tx_interleaved(n, &req->sg, ptr, len, ns->lbasz,
|
||||||
ns->lbaf.ms, 0, dir);
|
ns->lbaf.ms, 0, dir);
|
||||||
}
|
}
|
||||||
|
@ -1950,14 +1945,13 @@ static void nvme_verify_cb(void *opaque, int ret)
|
||||||
BlockAcctStats *stats = blk_get_stats(blk);
|
BlockAcctStats *stats = blk_get_stats(blk);
|
||||||
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
||||||
uint64_t slba = le64_to_cpu(rw->slba);
|
uint64_t slba = le64_to_cpu(rw->slba);
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint8_t prinfo = NVME_RW_PRINFO(le16_to_cpu(rw->control));
|
||||||
uint16_t apptag = le16_to_cpu(rw->apptag);
|
uint16_t apptag = le16_to_cpu(rw->apptag);
|
||||||
uint16_t appmask = le16_to_cpu(rw->appmask);
|
uint16_t appmask = le16_to_cpu(rw->appmask);
|
||||||
uint32_t reftag = le32_to_cpu(rw->reftag);
|
uint32_t reftag = le32_to_cpu(rw->reftag);
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
|
|
||||||
trace_pci_nvme_verify_cb(nvme_cid(req), NVME_RW_PRINFO(ctrl), apptag,
|
trace_pci_nvme_verify_cb(nvme_cid(req), prinfo, apptag, appmask, reftag);
|
||||||
appmask, reftag);
|
|
||||||
|
|
||||||
if (ret) {
|
if (ret) {
|
||||||
block_acct_failed(stats, acct);
|
block_acct_failed(stats, acct);
|
||||||
|
@ -1977,7 +1971,7 @@ static void nvme_verify_cb(void *opaque, int ret)
|
||||||
|
|
||||||
req->status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
req->status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
||||||
ctx->mdata.bounce, ctx->mdata.iov.size,
|
ctx->mdata.bounce, ctx->mdata.iov.size,
|
||||||
ctrl, slba, apptag, appmask, &reftag);
|
prinfo, slba, apptag, appmask, &reftag);
|
||||||
}
|
}
|
||||||
|
|
||||||
out:
|
out:
|
||||||
|
@ -2183,8 +2177,8 @@ static void nvme_copy_in_complete(NvmeRequest *req)
|
||||||
block_acct_done(blk_get_stats(ns->blkconf.blk), &req->acct);
|
block_acct_done(blk_get_stats(ns->blkconf.blk), &req->acct);
|
||||||
|
|
||||||
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
||||||
uint16_t prinfor = (copy->control[0] >> 4) & 0xf;
|
uint8_t prinfor = (copy->control[0] >> 4) & 0xf;
|
||||||
uint16_t prinfow = (copy->control[2] >> 2) & 0xf;
|
uint8_t prinfow = (copy->control[2] >> 2) & 0xf;
|
||||||
uint16_t nr = copy->nr + 1;
|
uint16_t nr = copy->nr + 1;
|
||||||
NvmeCopySourceRange *range;
|
NvmeCopySourceRange *range;
|
||||||
uint64_t slba;
|
uint64_t slba;
|
||||||
|
@ -2195,13 +2189,6 @@ static void nvme_copy_in_complete(NvmeRequest *req)
|
||||||
size_t len, mlen;
|
size_t len, mlen;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
/*
|
|
||||||
* The dif helpers expects prinfo to be similar to the control field of
|
|
||||||
* the NvmeRwCmd, so shift by 10 to fake it.
|
|
||||||
*/
|
|
||||||
prinfor = prinfor << 10;
|
|
||||||
prinfow = prinfow << 10;
|
|
||||||
|
|
||||||
for (i = 0; i < nr; i++) {
|
for (i = 0; i < nr; i++) {
|
||||||
range = &ctx->ranges[i];
|
range = &ctx->ranges[i];
|
||||||
slba = le64_to_cpu(range->slba);
|
slba = le64_to_cpu(range->slba);
|
||||||
|
@ -2342,7 +2329,7 @@ static void nvme_compare_mdata_cb(void *opaque, int ret)
|
||||||
NvmeNamespace *ns = req->ns;
|
NvmeNamespace *ns = req->ns;
|
||||||
NvmeCtrl *n = nvme_ctrl(req);
|
NvmeCtrl *n = nvme_ctrl(req);
|
||||||
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint8_t prinfo = NVME_RW_PRINFO(le16_to_cpu(rw->control));
|
||||||
uint16_t apptag = le16_to_cpu(rw->apptag);
|
uint16_t apptag = le16_to_cpu(rw->apptag);
|
||||||
uint16_t appmask = le16_to_cpu(rw->appmask);
|
uint16_t appmask = le16_to_cpu(rw->appmask);
|
||||||
uint32_t reftag = le32_to_cpu(rw->reftag);
|
uint32_t reftag = le32_to_cpu(rw->reftag);
|
||||||
|
@ -2378,7 +2365,7 @@ static void nvme_compare_mdata_cb(void *opaque, int ret)
|
||||||
int16_t pil = 0;
|
int16_t pil = 0;
|
||||||
|
|
||||||
status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
||||||
ctx->mdata.bounce, ctx->mdata.iov.size, ctrl,
|
ctx->mdata.bounce, ctx->mdata.iov.size, prinfo,
|
||||||
slba, apptag, appmask, &reftag);
|
slba, apptag, appmask, &reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
req->status = status;
|
req->status = status;
|
||||||
|
@ -2674,7 +2661,7 @@ static uint16_t nvme_verify(NvmeCtrl *n, NvmeRequest *req)
|
||||||
uint32_t nlb = le16_to_cpu(rw->nlb) + 1;
|
uint32_t nlb = le16_to_cpu(rw->nlb) + 1;
|
||||||
size_t len = nvme_l2b(ns, nlb);
|
size_t len = nvme_l2b(ns, nlb);
|
||||||
int64_t offset = nvme_l2b(ns, slba);
|
int64_t offset = nvme_l2b(ns, slba);
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint8_t prinfo = NVME_RW_PRINFO(le16_to_cpu(rw->control));
|
||||||
uint32_t reftag = le32_to_cpu(rw->reftag);
|
uint32_t reftag = le32_to_cpu(rw->reftag);
|
||||||
NvmeBounceContext *ctx = NULL;
|
NvmeBounceContext *ctx = NULL;
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
|
@ -2682,12 +2669,12 @@ static uint16_t nvme_verify(NvmeCtrl *n, NvmeRequest *req)
|
||||||
trace_pci_nvme_verify(nvme_cid(req), nvme_nsid(ns), slba, nlb);
|
trace_pci_nvme_verify(nvme_cid(req), nvme_nsid(ns), slba, nlb);
|
||||||
|
|
||||||
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
||||||
status = nvme_check_prinfo(ns, ctrl, slba, reftag);
|
status = nvme_check_prinfo(ns, prinfo, slba, reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ctrl & NVME_RW_PRINFO_PRACT) {
|
if (prinfo & NVME_PRINFO_PRACT) {
|
||||||
return NVME_INVALID_PROT_INFO | NVME_DNR;
|
return NVME_INVALID_PROT_INFO | NVME_DNR;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -2731,13 +2718,8 @@ static uint16_t nvme_copy(NvmeCtrl *n, NvmeRequest *req)
|
||||||
|
|
||||||
uint16_t nr = copy->nr + 1;
|
uint16_t nr = copy->nr + 1;
|
||||||
uint8_t format = copy->control[0] & 0xf;
|
uint8_t format = copy->control[0] & 0xf;
|
||||||
|
uint8_t prinfor = (copy->control[0] >> 4) & 0xf;
|
||||||
/*
|
uint8_t prinfow = (copy->control[2] >> 2) & 0xf;
|
||||||
* Shift the PRINFOR/PRINFOW values by 10 to allow reusing the
|
|
||||||
* NVME_RW_PRINFO constants.
|
|
||||||
*/
|
|
||||||
uint16_t prinfor = ((copy->control[0] >> 4) & 0xf) << 10;
|
|
||||||
uint16_t prinfow = ((copy->control[2] >> 2) & 0xf) << 10;
|
|
||||||
|
|
||||||
uint32_t nlb = 0;
|
uint32_t nlb = 0;
|
||||||
uint8_t *bounce = NULL, *bouncep = NULL;
|
uint8_t *bounce = NULL, *bouncep = NULL;
|
||||||
|
@ -2749,7 +2731,7 @@ static uint16_t nvme_copy(NvmeCtrl *n, NvmeRequest *req)
|
||||||
trace_pci_nvme_copy(nvme_cid(req), nvme_nsid(ns), nr, format);
|
trace_pci_nvme_copy(nvme_cid(req), nvme_nsid(ns), nr, format);
|
||||||
|
|
||||||
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) &&
|
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) &&
|
||||||
((prinfor & NVME_RW_PRINFO_PRACT) != (prinfow & NVME_RW_PRINFO_PRACT))) {
|
((prinfor & NVME_PRINFO_PRACT) != (prinfow & NVME_PRINFO_PRACT))) {
|
||||||
return NVME_INVALID_FIELD | NVME_DNR;
|
return NVME_INVALID_FIELD | NVME_DNR;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2886,7 +2868,7 @@ static uint16_t nvme_compare(NvmeCtrl *n, NvmeRequest *req)
|
||||||
BlockBackend *blk = ns->blkconf.blk;
|
BlockBackend *blk = ns->blkconf.blk;
|
||||||
uint64_t slba = le64_to_cpu(rw->slba);
|
uint64_t slba = le64_to_cpu(rw->slba);
|
||||||
uint32_t nlb = le16_to_cpu(rw->nlb) + 1;
|
uint32_t nlb = le16_to_cpu(rw->nlb) + 1;
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint8_t prinfo = NVME_RW_PRINFO(le16_to_cpu(rw->control));
|
||||||
size_t data_len = nvme_l2b(ns, nlb);
|
size_t data_len = nvme_l2b(ns, nlb);
|
||||||
size_t len = data_len;
|
size_t len = data_len;
|
||||||
int64_t offset = nvme_l2b(ns, slba);
|
int64_t offset = nvme_l2b(ns, slba);
|
||||||
|
@ -2895,7 +2877,7 @@ static uint16_t nvme_compare(NvmeCtrl *n, NvmeRequest *req)
|
||||||
|
|
||||||
trace_pci_nvme_compare(nvme_cid(req), nvme_nsid(ns), slba, nlb);
|
trace_pci_nvme_compare(nvme_cid(req), nvme_nsid(ns), slba, nlb);
|
||||||
|
|
||||||
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) && (ctrl & NVME_RW_PRINFO_PRACT)) {
|
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) && (prinfo & NVME_PRINFO_PRACT)) {
|
||||||
return NVME_INVALID_PROT_INFO | NVME_DNR;
|
return NVME_INVALID_PROT_INFO | NVME_DNR;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3083,7 +3065,7 @@ static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *req)
|
||||||
NvmeNamespace *ns = req->ns;
|
NvmeNamespace *ns = req->ns;
|
||||||
uint64_t slba = le64_to_cpu(rw->slba);
|
uint64_t slba = le64_to_cpu(rw->slba);
|
||||||
uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
|
uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint8_t prinfo = NVME_RW_PRINFO(le16_to_cpu(rw->control));
|
||||||
uint64_t data_size = nvme_l2b(ns, nlb);
|
uint64_t data_size = nvme_l2b(ns, nlb);
|
||||||
uint64_t mapped_size = data_size;
|
uint64_t mapped_size = data_size;
|
||||||
uint64_t data_offset;
|
uint64_t data_offset;
|
||||||
|
@ -3094,7 +3076,7 @@ static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *req)
|
||||||
mapped_size += nvme_m2b(ns, nlb);
|
mapped_size += nvme_m2b(ns, nlb);
|
||||||
|
|
||||||
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
||||||
bool pract = ctrl & NVME_RW_PRINFO_PRACT;
|
bool pract = prinfo & NVME_PRINFO_PRACT;
|
||||||
|
|
||||||
if (pract && ns->lbaf.ms == 8) {
|
if (pract && ns->lbaf.ms == 8) {
|
||||||
mapped_size = data_size;
|
mapped_size = data_size;
|
||||||
|
@ -3158,6 +3140,7 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool append,
|
||||||
uint64_t slba = le64_to_cpu(rw->slba);
|
uint64_t slba = le64_to_cpu(rw->slba);
|
||||||
uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
|
uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint16_t ctrl = le16_to_cpu(rw->control);
|
||||||
|
uint8_t prinfo = NVME_RW_PRINFO(ctrl);
|
||||||
uint64_t data_size = nvme_l2b(ns, nlb);
|
uint64_t data_size = nvme_l2b(ns, nlb);
|
||||||
uint64_t mapped_size = data_size;
|
uint64_t mapped_size = data_size;
|
||||||
uint64_t data_offset;
|
uint64_t data_offset;
|
||||||
|
@ -3170,7 +3153,7 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool append,
|
||||||
mapped_size += nvme_m2b(ns, nlb);
|
mapped_size += nvme_m2b(ns, nlb);
|
||||||
|
|
||||||
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
||||||
bool pract = ctrl & NVME_RW_PRINFO_PRACT;
|
bool pract = prinfo & NVME_PRINFO_PRACT;
|
||||||
|
|
||||||
if (pract && ns->lbaf.ms == 8) {
|
if (pract && ns->lbaf.ms == 8) {
|
||||||
mapped_size -= nvme_m2b(ns, nlb);
|
mapped_size -= nvme_m2b(ns, nlb);
|
||||||
|
|
|
@ -15,11 +15,11 @@
|
||||||
#include "nvme.h"
|
#include "nvme.h"
|
||||||
#include "trace.h"
|
#include "trace.h"
|
||||||
|
|
||||||
uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint16_t ctrl, uint64_t slba,
|
uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint8_t prinfo, uint64_t slba,
|
||||||
uint32_t reftag)
|
uint32_t reftag)
|
||||||
{
|
{
|
||||||
if ((NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) == NVME_ID_NS_DPS_TYPE_1) &&
|
if ((NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) == NVME_ID_NS_DPS_TYPE_1) &&
|
||||||
(ctrl & NVME_RW_PRINFO_PRCHK_REF) && (slba & 0xffffffff) != reftag) {
|
(prinfo & NVME_PRINFO_PRCHK_REF) && (slba & 0xffffffff) != reftag) {
|
||||||
return NVME_INVALID_PROT_INFO | NVME_DNR;
|
return NVME_INVALID_PROT_INFO | NVME_DNR;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -73,7 +73,7 @@ void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
||||||
|
|
||||||
static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDifTuple *dif,
|
static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDifTuple *dif,
|
||||||
uint8_t *buf, uint8_t *mbuf, size_t pil,
|
uint8_t *buf, uint8_t *mbuf, size_t pil,
|
||||||
uint16_t ctrl, uint16_t apptag,
|
uint8_t prinfo, uint16_t apptag,
|
||||||
uint16_t appmask, uint32_t reftag)
|
uint16_t appmask, uint32_t reftag)
|
||||||
{
|
{
|
||||||
switch (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
switch (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) {
|
||||||
|
@ -95,7 +95,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDifTuple *dif,
|
||||||
return NVME_SUCCESS;
|
return NVME_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ctrl & NVME_RW_PRINFO_PRCHK_GUARD) {
|
if (prinfo & NVME_PRINFO_PRCHK_GUARD) {
|
||||||
uint16_t crc = crc_t10dif(0x0, buf, ns->lbasz);
|
uint16_t crc = crc_t10dif(0x0, buf, ns->lbasz);
|
||||||
|
|
||||||
if (pil) {
|
if (pil) {
|
||||||
|
@ -109,7 +109,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDifTuple *dif,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ctrl & NVME_RW_PRINFO_PRCHK_APP) {
|
if (prinfo & NVME_PRINFO_PRCHK_APP) {
|
||||||
trace_pci_nvme_dif_prchk_apptag(be16_to_cpu(dif->apptag), apptag,
|
trace_pci_nvme_dif_prchk_apptag(be16_to_cpu(dif->apptag), apptag,
|
||||||
appmask);
|
appmask);
|
||||||
|
|
||||||
|
@ -118,7 +118,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDifTuple *dif,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ctrl & NVME_RW_PRINFO_PRCHK_REF) {
|
if (prinfo & NVME_PRINFO_PRCHK_REF) {
|
||||||
trace_pci_nvme_dif_prchk_reftag(be32_to_cpu(dif->reftag), reftag);
|
trace_pci_nvme_dif_prchk_reftag(be32_to_cpu(dif->reftag), reftag);
|
||||||
|
|
||||||
if (be32_to_cpu(dif->reftag) != reftag) {
|
if (be32_to_cpu(dif->reftag) != reftag) {
|
||||||
|
@ -130,7 +130,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDifTuple *dif,
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
||||||
uint8_t *mbuf, size_t mlen, uint16_t ctrl,
|
uint8_t *mbuf, size_t mlen, uint8_t prinfo,
|
||||||
uint64_t slba, uint16_t apptag,
|
uint64_t slba, uint16_t apptag,
|
||||||
uint16_t appmask, uint32_t *reftag)
|
uint16_t appmask, uint32_t *reftag)
|
||||||
{
|
{
|
||||||
|
@ -138,7 +138,7 @@ uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
||||||
int16_t pil = 0;
|
int16_t pil = 0;
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
|
|
||||||
status = nvme_check_prinfo(ns, ctrl, slba, *reftag);
|
status = nvme_check_prinfo(ns, prinfo, slba, *reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
@ -147,12 +147,12 @@ uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
||||||
pil = ns->lbaf.ms - sizeof(NvmeDifTuple);
|
pil = ns->lbaf.ms - sizeof(NvmeDifTuple);
|
||||||
}
|
}
|
||||||
|
|
||||||
trace_pci_nvme_dif_check(NVME_RW_PRINFO(ctrl), ns->lbasz + pil);
|
trace_pci_nvme_dif_check(prinfo, ns->lbasz + pil);
|
||||||
|
|
||||||
for (; buf < end; buf += ns->lbasz, mbuf += ns->lbaf.ms) {
|
for (; buf < end; buf += ns->lbasz, mbuf += ns->lbaf.ms) {
|
||||||
NvmeDifTuple *dif = (NvmeDifTuple *)(mbuf + pil);
|
NvmeDifTuple *dif = (NvmeDifTuple *)(mbuf + pil);
|
||||||
|
|
||||||
status = nvme_dif_prchk(ns, dif, buf, mbuf, pil, ctrl, apptag,
|
status = nvme_dif_prchk(ns, dif, buf, mbuf, pil, prinfo, apptag,
|
||||||
appmask, *reftag);
|
appmask, *reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
return status;
|
return status;
|
||||||
|
@ -248,14 +248,14 @@ static void nvme_dif_rw_check_cb(void *opaque, int ret)
|
||||||
NvmeCtrl *n = nvme_ctrl(req);
|
NvmeCtrl *n = nvme_ctrl(req);
|
||||||
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
|
||||||
uint64_t slba = le64_to_cpu(rw->slba);
|
uint64_t slba = le64_to_cpu(rw->slba);
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint8_t prinfo = NVME_RW_PRINFO(le16_to_cpu(rw->control));
|
||||||
uint16_t apptag = le16_to_cpu(rw->apptag);
|
uint16_t apptag = le16_to_cpu(rw->apptag);
|
||||||
uint16_t appmask = le16_to_cpu(rw->appmask);
|
uint16_t appmask = le16_to_cpu(rw->appmask);
|
||||||
uint32_t reftag = le32_to_cpu(rw->reftag);
|
uint32_t reftag = le32_to_cpu(rw->reftag);
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
|
|
||||||
trace_pci_nvme_dif_rw_check_cb(nvme_cid(req), NVME_RW_PRINFO(ctrl), apptag,
|
trace_pci_nvme_dif_rw_check_cb(nvme_cid(req), prinfo, apptag, appmask,
|
||||||
appmask, reftag);
|
reftag);
|
||||||
|
|
||||||
if (ret) {
|
if (ret) {
|
||||||
goto out;
|
goto out;
|
||||||
|
@ -269,7 +269,7 @@ static void nvme_dif_rw_check_cb(void *opaque, int ret)
|
||||||
}
|
}
|
||||||
|
|
||||||
status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
||||||
ctx->mdata.bounce, ctx->mdata.iov.size, ctrl,
|
ctx->mdata.bounce, ctx->mdata.iov.size, prinfo,
|
||||||
slba, apptag, appmask, &reftag);
|
slba, apptag, appmask, &reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
req->status = status;
|
req->status = status;
|
||||||
|
@ -283,7 +283,7 @@ static void nvme_dif_rw_check_cb(void *opaque, int ret)
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ctrl & NVME_RW_PRINFO_PRACT && ns->lbaf.ms == 8) {
|
if (prinfo & NVME_PRINFO_PRACT && ns->lbaf.ms == 8) {
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -364,15 +364,15 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req)
|
||||||
size_t mlen = nvme_m2b(ns, nlb);
|
size_t mlen = nvme_m2b(ns, nlb);
|
||||||
size_t mapped_len = len;
|
size_t mapped_len = len;
|
||||||
int64_t offset = nvme_l2b(ns, slba);
|
int64_t offset = nvme_l2b(ns, slba);
|
||||||
uint16_t ctrl = le16_to_cpu(rw->control);
|
uint8_t prinfo = NVME_RW_PRINFO(le16_to_cpu(rw->control));
|
||||||
uint16_t apptag = le16_to_cpu(rw->apptag);
|
uint16_t apptag = le16_to_cpu(rw->apptag);
|
||||||
uint16_t appmask = le16_to_cpu(rw->appmask);
|
uint16_t appmask = le16_to_cpu(rw->appmask);
|
||||||
uint32_t reftag = le32_to_cpu(rw->reftag);
|
uint32_t reftag = le32_to_cpu(rw->reftag);
|
||||||
bool pract = !!(ctrl & NVME_RW_PRINFO_PRACT);
|
bool pract = !!(prinfo & NVME_PRINFO_PRACT);
|
||||||
NvmeBounceContext *ctx;
|
NvmeBounceContext *ctx;
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
|
|
||||||
trace_pci_nvme_dif_rw(pract, NVME_RW_PRINFO(ctrl));
|
trace_pci_nvme_dif_rw(pract, prinfo);
|
||||||
|
|
||||||
ctx = g_new0(NvmeBounceContext, 1);
|
ctx = g_new0(NvmeBounceContext, 1);
|
||||||
ctx->req = req;
|
ctx->req = req;
|
||||||
|
@ -380,7 +380,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req)
|
||||||
if (wrz) {
|
if (wrz) {
|
||||||
BdrvRequestFlags flags = BDRV_REQ_MAY_UNMAP;
|
BdrvRequestFlags flags = BDRV_REQ_MAY_UNMAP;
|
||||||
|
|
||||||
if (ctrl & NVME_RW_PRINFO_PRCHK_MASK) {
|
if (prinfo & NVME_PRINFO_PRCHK_MASK) {
|
||||||
status = NVME_INVALID_PROT_INFO | NVME_DNR;
|
status = NVME_INVALID_PROT_INFO | NVME_DNR;
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
@ -389,7 +389,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req)
|
||||||
uint8_t *mbuf, *end;
|
uint8_t *mbuf, *end;
|
||||||
int16_t pil = ns->lbaf.ms - sizeof(NvmeDifTuple);
|
int16_t pil = ns->lbaf.ms - sizeof(NvmeDifTuple);
|
||||||
|
|
||||||
status = nvme_check_prinfo(ns, ctrl, slba, reftag);
|
status = nvme_check_prinfo(ns, prinfo, slba, reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
@ -469,7 +469,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
status = nvme_check_prinfo(ns, ctrl, slba, reftag);
|
status = nvme_check_prinfo(ns, prinfo, slba, reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
@ -481,7 +481,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req)
|
||||||
apptag, &reftag);
|
apptag, &reftag);
|
||||||
} else {
|
} else {
|
||||||
status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
status = nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size,
|
||||||
ctx->mdata.bounce, ctx->mdata.iov.size, ctrl,
|
ctx->mdata.bounce, ctx->mdata.iov.size, prinfo,
|
||||||
slba, apptag, appmask, &reftag);
|
slba, apptag, appmask, &reftag);
|
||||||
if (status) {
|
if (status) {
|
||||||
goto err;
|
goto err;
|
||||||
|
|
|
@ -536,7 +536,7 @@ static const uint16_t t10_dif_crc_table[256] = {
|
||||||
0xF0D8, 0x7B6F, 0x6C01, 0xE7B6, 0x42DD, 0xC96A, 0xDE04, 0x55B3
|
0xF0D8, 0x7B6F, 0x6C01, 0xE7B6, 0x42DD, 0xC96A, 0xDE04, 0x55B3
|
||||||
};
|
};
|
||||||
|
|
||||||
uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint16_t ctrl, uint64_t slba,
|
uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint8_t prinfo, uint64_t slba,
|
||||||
uint32_t reftag);
|
uint32_t reftag);
|
||||||
uint16_t nvme_dif_mangle_mdata(NvmeNamespace *ns, uint8_t *mbuf, size_t mlen,
|
uint16_t nvme_dif_mangle_mdata(NvmeNamespace *ns, uint8_t *mbuf, size_t mlen,
|
||||||
uint64_t slba);
|
uint64_t slba);
|
||||||
|
@ -544,7 +544,7 @@ void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
||||||
uint8_t *mbuf, size_t mlen, uint16_t apptag,
|
uint8_t *mbuf, size_t mlen, uint16_t apptag,
|
||||||
uint32_t *reftag);
|
uint32_t *reftag);
|
||||||
uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len,
|
||||||
uint8_t *mbuf, size_t mlen, uint16_t ctrl,
|
uint8_t *mbuf, size_t mlen, uint8_t prinfo,
|
||||||
uint64_t slba, uint16_t apptag,
|
uint64_t slba, uint16_t apptag,
|
||||||
uint16_t appmask, uint32_t *reftag);
|
uint16_t appmask, uint32_t *reftag);
|
||||||
uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req);
|
uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req);
|
||||||
|
|
|
@ -708,6 +708,14 @@ enum {
|
||||||
|
|
||||||
#define NVME_RW_PRINFO(control) ((control >> 10) & 0xf)
|
#define NVME_RW_PRINFO(control) ((control >> 10) & 0xf)
|
||||||
|
|
||||||
|
enum {
|
||||||
|
NVME_PRINFO_PRACT = 1 << 3,
|
||||||
|
NVME_PRINFO_PRCHK_GUARD = 1 << 2,
|
||||||
|
NVME_PRINFO_PRCHK_APP = 1 << 1,
|
||||||
|
NVME_PRINFO_PRCHK_REF = 1 << 0,
|
||||||
|
NVME_PRINFO_PRCHK_MASK = 7 << 0,
|
||||||
|
};
|
||||||
|
|
||||||
typedef struct QEMU_PACKED NvmeDsmCmd {
|
typedef struct QEMU_PACKED NvmeDsmCmd {
|
||||||
uint8_t opcode;
|
uint8_t opcode;
|
||||||
uint8_t flags;
|
uint8_t flags;
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue