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target/arm: Implement SVE Floating Point Arithmetic - Unpredicated Group
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180613015641.5667-19-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -3372,6 +3372,48 @@ DO_ZZI(UMIN, umin)
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#undef DO_ZZI
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/*
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*** SVE Floating Point Arithmetic - Unpredicated Group
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*/
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static bool do_zzz_fp(DisasContext *s, arg_rrr_esz *a,
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gen_helper_gvec_3_ptr *fn)
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{
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if (fn == NULL) {
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return false;
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}
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if (sve_access_check(s)) {
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unsigned vsz = vec_full_reg_size(s);
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TCGv_ptr status = get_fpstatus_ptr(a->esz == MO_16);
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tcg_gen_gvec_3_ptr(vec_full_reg_offset(s, a->rd),
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vec_full_reg_offset(s, a->rn),
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vec_full_reg_offset(s, a->rm),
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status, vsz, vsz, 0, fn);
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tcg_temp_free_ptr(status);
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}
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return true;
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}
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#define DO_FP3(NAME, name) \
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static bool trans_##NAME(DisasContext *s, arg_rrr_esz *a, uint32_t insn) \
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{ \
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static gen_helper_gvec_3_ptr * const fns[4] = { \
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NULL, gen_helper_gvec_##name##_h, \
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gen_helper_gvec_##name##_s, gen_helper_gvec_##name##_d \
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}; \
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return do_zzz_fp(s, a, fns[a->esz]); \
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}
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DO_FP3(FADD_zzz, fadd)
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DO_FP3(FSUB_zzz, fsub)
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DO_FP3(FMUL_zzz, fmul)
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DO_FP3(FTSMUL, ftsmul)
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DO_FP3(FRECPS, recps)
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DO_FP3(FRSQRTS, rsqrts)
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#undef DO_FP3
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/*
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*** SVE Memory - 32-bit Gather and Unsized Contiguous Group
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*/
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