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target-arm: Add SPSR entries for EL2/HYP and EL3/MON
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1400980132-25949-12-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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4 changed files with 12 additions and 6 deletions
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@ -143,7 +143,7 @@ typedef struct CPUARMState {
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uint32_t spsr;
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/* Banked registers. */
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uint64_t banked_spsr[6];
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uint64_t banked_spsr[8];
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uint32_t banked_r13[6];
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uint32_t banked_r14[6];
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@ -563,7 +563,9 @@ enum arm_cpu_mode {
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ARM_CPU_MODE_FIQ = 0x11,
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ARM_CPU_MODE_IRQ = 0x12,
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ARM_CPU_MODE_SVC = 0x13,
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ARM_CPU_MODE_MON = 0x16,
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ARM_CPU_MODE_ABT = 0x17,
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ARM_CPU_MODE_HYP = 0x1a,
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ARM_CPU_MODE_UND = 0x1b,
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ARM_CPU_MODE_SYS = 0x1f
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};
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