aspeed: add support for the Aspeed MII controller of the AST2600

The AST2600 SoC has an extra controller to set the PHY registers.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-23-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2019-09-25 16:32:47 +02:00 committed by Peter Maydell
parent d300db0277
commit 289251b033
4 changed files with 204 additions and 0 deletions

View file

@ -66,4 +66,21 @@ typedef struct FTGMAC100State {
uint32_t rxdes0_edorr;
} FTGMAC100State;
#define TYPE_ASPEED_MII "aspeed-mmi"
#define ASPEED_MII(obj) OBJECT_CHECK(AspeedMiiState, (obj), TYPE_ASPEED_MII)
/*
* AST2600 MII controller
*/
typedef struct AspeedMiiState {
/*< private >*/
SysBusDevice parent_obj;
FTGMAC100State *nic;
MemoryRegion iomem;
uint32_t phycr;
uint32_t phydata;
} AspeedMiiState;
#endif