mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-02 07:13:54 -06:00
target/rx: CPU definitions
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Use newer QOM style, split cpu-qom.h, restrict access to extable array, use rx_cpu_tlb_fill() extracted from patch of Yoshinori Sato 'Convert to CPUClass::tlb_fill', call cpu_reset after qemu_init_vcpu, make rx_crname a function] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200224141923.82118-7-ysato@users.sourceforge.jp> Acked-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Use GByteArray in gdbstub (rebase commita010bdbe
), use device_class_set_parent_reset (rebase commit781c67ca
)] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
parent
075d047e2b
commit
27a4a30e29
8 changed files with 682 additions and 6 deletions
30
target/rx/cpu-param.h
Normal file
30
target/rx/cpu-param.h
Normal file
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
* RX cpu parameters
|
||||
*
|
||||
* Copyright (c) 2019 Yoshinori Sato
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2 or later, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef RX_CPU_PARAM_H
|
||||
#define RX_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
#define TARGET_PAGE_BITS 12
|
||||
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
|
||||
#define NB_MMU_MODES 1
|
||||
|
||||
#endif
|
Loading…
Add table
Add a link
Reference in a new issue