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ppc patch queue for 2023-07-07:

Browse source 
In this last queue for 8.1 we have a lot of fixes and improvements all
 around: SMT support for powerNV, XIVE fixes, PPC440 cleanups, exception
 handling cleanups and kvm_pph.h cleanups just to name a few.
 
 Thanks everyone in the qemu-ppc community for all the contributions for
 the next QEMU 8.1 release.
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 =8lDs
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Merge tag 'pull-ppc-20230707-1' of https://gitlab.com/danielhb/qemu into staging

ppc patch queue for 2023-07-07:

In this last queue for 8.1 we have a lot of fixes and improvements all
around: SMT support for powerNV, XIVE fixes, PPC440 cleanups, exception
handling cleanups and kvm_pph.h cleanups just to name a few.

Thanks everyone in the qemu-ppc community for all the contributions for
the next QEMU 8.1 release.

# -----BEGIN PGP SIGNATURE-----
#
# iIwEABYKADQWIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCZKgihBYcZGFuaWVsaGI0
# MTNAZ21haWwuY29tAAoJEDzZypbeAzFksr0A/jrvSDSDxB5mR7bo0dNGndLXcdTo
# ZGr6k6pcMpr7RDOAAQDVeaw7f8djQ4Aaelk6v1wPs5bYfNY2ElF4NsqHJFX2Cg==
# =8lDs
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 07 Jul 2023 03:34:44 PM BST
# gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg:                issuer "danielhb413@gmail.com"
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164

* tag 'pull-ppc-20230707-1' of https://gitlab.com/danielhb/qemu: (59 commits)
  ppc/pnv: Add QME region for P10
  target/ppc: Remove pointless checks of CONFIG_USER_ONLY in 'kvm_ppc.h'
  target/ppc: Restrict 'kvm_ppc.h' to sysemu in cpu_init.c
  target/ppc: Define TYPE_HOST_POWERPC_CPU in cpu-qom.h
  target/ppc: Move CPU QOM definitions to cpu-qom.h
  target/ppc: Reorder #ifdef'ry in kvm_ppc.h
  target/ppc: Have 'kvm_ppc.h' include 'sysemu/kvm.h'
  target/ppc: Machine check on invalid real address access on POWER9/10
  tests/qtest: Add xscom tests for powernv10 machine
  ppc/pnv: Set P10 core xscom region size to match hardware
  ppc/pnv: Log all unimp warnings with similar message
  ppc440_pcix: Rename QOM type define abd move it to common header
  ppc4xx_pci: Add define for ppc4xx-host-bridge type name
  ppc4xx_pci: Rename QOM type name define
  ppc440_pcix: Stop using system io region for PCI bus
  ppc440_pcix: Don't use iomem for regs
  ppc/sam460ex: Remove address_space_mem local variable
  ppc440: Remove ppc460ex_pcie_init legacy init function
  ppc440: Add busnum property to PCIe controller model
  ppc440: Stop using system io region for PCIe buses
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-07-07 22:23:17 +01:00
commit 276d72ca1b
41 changed files with 1043 additions and 454 deletions
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52
hw/net/sungem.c
View file

@ -107,6 +107,15 @@ OBJECT_DECLARE_SIMPLE_TYPE(SunGEMState, SUNGEM)
#define RXDMA_FTAG 0x0110UL /* RX FIFO Tag */
#define RXDMA_FSZ 0x0120UL /* RX FIFO Size */
/* WOL Registers */
#define SUNGEM_MMIO_WOL_SIZE 0x14
#define WOL_MATCH0 0x0000UL
#define WOL_MATCH1 0x0004UL
#define WOL_MATCH2 0x0008UL
#define WOL_MCOUNT 0x000CUL
#define WOL_WAKECSR 0x0010UL
/* MAC Registers */
#define SUNGEM_MMIO_MAC_SIZE 0x200
@ -168,6 +177,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(SunGEMState, SUNGEM)
#define SUNGEM_MMIO_PCS_SIZE 0x60
#define PCS_MIISTAT 0x0004UL /* PCS MII Status Register */
#define PCS_ISTAT 0x0018UL /* PCS Interrupt Status Reg */
#define PCS_SSTATE 0x005CUL /* Serialink State Register */
/* Descriptors */
@ -200,6 +210,7 @@ struct SunGEMState {
MemoryRegion greg;
MemoryRegion txdma;
MemoryRegion rxdma;
MemoryRegion wol;
MemoryRegion mac;
MemoryRegion mif;
MemoryRegion pcs;
@ -1062,6 +1073,43 @@ static const MemoryRegionOps sungem_mmio_rxdma_ops = {
},
};
static void sungem_mmio_wol_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
trace_sungem_mmio_wol_write(addr, val);
switch (addr) {
case WOL_WAKECSR:
if (val != 0) {
qemu_log_mask(LOG_UNIMP, "sungem: WOL not supported\n");
}
break;
default:
qemu_log_mask(LOG_UNIMP, "sungem: WOL not supported\n");
}
}
static uint64_t sungem_mmio_wol_read(void *opaque, hwaddr addr, unsigned size)
{
uint32_t val = -1;
qemu_log_mask(LOG_UNIMP, "sungem: WOL not supported\n");
trace_sungem_mmio_wol_read(addr, val);
return val;
}
static const MemoryRegionOps sungem_mmio_wol_ops = {
.read = sungem_mmio_wol_read,
.write = sungem_mmio_wol_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.impl = {
.min_access_size = 4,
.max_access_size = 4,
},
};
static void sungem_mmio_mac_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
@ -1330,6 +1378,10 @@ static void sungem_realize(PCIDevice *pci_dev, Error **errp)
"sungem.rxdma", SUNGEM_MMIO_RXDMA_SIZE);
memory_region_add_subregion(&s->sungem, 0x4000, &s->rxdma);
memory_region_init_io(&s->wol, OBJECT(s), &sungem_mmio_wol_ops, s,
"sungem.wol", SUNGEM_MMIO_WOL_SIZE);
memory_region_add_subregion(&s->sungem, 0x3000, &s->wol);
memory_region_init_io(&s->mac, OBJECT(s), &sungem_mmio_mac_ops, s,
"sungem.mac", SUNGEM_MMIO_MAC_SIZE);
memory_region_add_subregion(&s->sungem, 0x6000, &s->mac);