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cpu: Move exception_index field from CPU_COMMON to CPUState

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Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-08-26 08:31:06 +02:00
parent 6f03bef0ff
commit 27103424c4
60 changed files with 389 additions and 319 deletions
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25
target-arm/helper.c
View file

@ -2649,10 +2649,7 @@ uint32_t HELPER(rbit)(uint32_t x)
void arm_cpu_do_interrupt(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
env->exception_index = -1;
cs->exception_index = -1;
}
int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
@ -2662,10 +2659,10 @@ int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
CPUARMState *env = &cpu->env;
if (rw == 2) {
env->exception_index = EXCP_PREFETCH_ABORT;
cs->exception_index = EXCP_PREFETCH_ABORT;
env->cp15.c6_insn = address;
} else {
env->exception_index = EXCP_DATA_ABORT;
cs->exception_index = EXCP_DATA_ABORT;
env->cp15.c6_data = address;
}
return 1;
@ -2851,7 +2848,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
uint32_t lr;
uint32_t addr;
arm_log_exception(env->exception_index);
arm_log_exception(cs->exception_index);
lr = 0xfffffff1;
if (env->v7m.current_sp)
@ -2863,7 +2860,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
handle it. */
/* TODO: Need to escalate if the current priority is higher than the
one we're raising. */
switch (env->exception_index) {
switch (cs->exception_index) {
case EXCP_UDEF:
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
return;
@ -2895,7 +2892,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
do_v7m_exception_exit(env);
return;
default:
cpu_abort(env, "Unhandled exception 0x%x\n", env->exception_index);
cpu_abort(env, "Unhandled exception 0x%x\n", cs->exception_index);
return; /* Never happens. Keep compiler happy. */
}
@ -2936,10 +2933,10 @@ void arm_cpu_do_interrupt(CPUState *cs)
assert(!IS_M(env));
arm_log_exception(env->exception_index);
arm_log_exception(cs->exception_index);
/* TODO: Vectored interrupt controller. */
switch (env->exception_index) {
switch (cs->exception_index) {
case EXCP_UDEF:
new_mode = ARM_CPU_MODE_UND;
addr = 0x04;
@ -3020,7 +3017,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
offset = 4;
break;
default:
cpu_abort(env, "Unhandled exception 0x%x\n", env->exception_index);
cpu_abort(env, "Unhandled exception 0x%x\n", cs->exception_index);
return; /* Never happens. Keep compiler happy. */
}
/* High vectors. */
@ -3650,13 +3647,13 @@ int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
if (access_type == 2) {
env->cp15.c5_insn = ret;
env->cp15.c6_insn = address;
env->exception_index = EXCP_PREFETCH_ABORT;
cs->exception_index = EXCP_PREFETCH_ABORT;
} else {
env->cp15.c5_data = ret;
if (access_type == 1 && arm_feature(env, ARM_FEATURE_V6))
env->cp15.c5_data |= (1 << 11);
env->cp15.c6_data = address;
env->exception_index = EXCP_DATA_ABORT;
cs->exception_index = EXCP_DATA_ABORT;
}
return 1;
}

20
target-arm/op_helper.c
View file

@ -24,7 +24,10 @@
static void raise_exception(CPUARMState *env, int tt)
{
env->exception_index = tt;
ARMCPU *cpu = arm_env_get_cpu(env);
CPUState *cs = CPU(cpu);
cs->exception_index = tt;
cpu_loop_exit(env);
}
@ -75,15 +78,16 @@ void tlb_fill(CPUARMState *env, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr)
{
ARMCPU *cpu = arm_env_get_cpu(env);
CPUState *cs = CPU(cpu);
int ret;
ret = arm_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx);
ret = arm_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret)) {
if (retaddr) {
/* now we have a real cpu fault */
cpu_restore_state(env, retaddr);
}
raise_exception(env, env->exception_index);
raise_exception(env, cs->exception_index);
}
}
#endif
@ -221,23 +225,27 @@ void HELPER(wfi)(CPUARMState *env)
{
CPUState *cs = CPU(arm_env_get_cpu(env));
env->exception_index = EXCP_HLT;
cs->exception_index = EXCP_HLT;
cs->halted = 1;
cpu_loop_exit(env);
}
void HELPER(wfe)(CPUARMState *env)
{
CPUState *cs = CPU(arm_env_get_cpu(env));
/* Don't actually halt the CPU, just yield back to top
* level loop
*/
env->exception_index = EXCP_YIELD;
cs->exception_index = EXCP_YIELD;
cpu_loop_exit(env);
}
void HELPER(exception)(CPUARMState *env, uint32_t excp)
{
env->exception_index = excp;
CPUState *cs = CPU(arm_env_get_cpu(env));
cs->exception_index = excp;
cpu_loop_exit(env);
}