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target-tricore: Add instructions of SRR opcode format

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Add instructions of SRR opcode format.
Add helper for add/sub_ssov.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-id: 1409572800-4116-8-git-send-email-kbastian@mail.uni-paderborn.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Bastian Koppelmann 2014-09-01 12:59:52 +01:00 • committed by Peter Maydell
parent 0707ec1bea
commit 2692802a37
3 changed files with 211 additions and 0 deletions
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43
target-tricore/op_helper.c
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@ -20,6 +20,49 @@
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
#define SSOV(env, ret, arg, len) do { \
int64_t max_pos = INT##len ##_MAX; \
int64_t max_neg = INT##len ##_MIN; \
if (arg > max_pos) { \
env->PSW_USB_V = (1 << 31); \
env->PSW_USB_SV = (1 << 31); \
ret = (target_ulong)max_pos; \
} else { \
if (arg < max_neg) { \
env->PSW_USB_V = (1 << 31); \
env->PSW_USB_SV = (1 << 31); \
ret = (target_ulong)max_neg; \
} else { \
env->PSW_USB_V = 0; \
ret = (target_ulong)arg; \
} \
} \
env->PSW_USB_AV = arg ^ arg * 2u; \
env->PSW_USB_SAV |= env->PSW_USB_AV; \
} while (0)
target_ulong helper_add_ssov(CPUTriCoreState *env, target_ulong r1,
target_ulong r2)
{
target_ulong ret;
int64_t t1 = sextract64(r1, 0, 32);
int64_t t2 = sextract64(r2, 0, 32);
int64_t result = t1 + t2;
SSOV(env, ret, result, 32);
return ret;
}
target_ulong helper_sub_ssov(CPUTriCoreState *env, target_ulong r1,
target_ulong r2)
{
target_ulong ret;
int64_t t1 = sextract64(r1, 0, 32);
int64_t t2 = sextract64(r2, 0, 32);
int64_t result = t1 - t2;
SSOV(env, ret, result, 32);
return ret;
}
static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env,
uint32_t exception,
int error_code,