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target/riscv: rvv-1.0: add vector unit-stride mask load/store insns

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Signed-off-by: Frank Chang <frank.chang@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-75-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Frank Chang 2021-12-10 15:57:00 +08:00 • committed by Alistair Francis
parent 5c89e9c096
commit 26086aea0d
4 changed files with 67 additions and 0 deletions
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40
target/riscv/insn_trans/trans_rvv.c.inc
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@ -697,6 +697,46 @@ GEN_VEXT_TRANS(vse16_v, MO_16, r2nfvm, st_us_op, st_us_check)
GEN_VEXT_TRANS(vse32_v, MO_32, r2nfvm, st_us_op, st_us_check)
GEN_VEXT_TRANS(vse64_v, MO_64, r2nfvm, st_us_op, st_us_check)
/*
*** unit stride mask load and store
*/
static bool ld_us_mask_op(DisasContext *s, arg_vlm_v *a, uint8_t eew)
{
uint32_t data = 0;
gen_helper_ldst_us *fn = gen_helper_vlm_v;
/* EMUL = 1, NFIELDS = 1 */
data = FIELD_DP32(data, VDATA, LMUL, 0);
data = FIELD_DP32(data, VDATA, NF, 1);
return ldst_us_trans(a->rd, a->rs1, data, fn, s, false);
}
static bool ld_us_mask_check(DisasContext *s, arg_vlm_v *a, uint8_t eew)
{
/* EMUL = 1, NFIELDS = 1 */
return require_rvv(s) && vext_check_isa_ill(s);
}
static bool st_us_mask_op(DisasContext *s, arg_vsm_v *a, uint8_t eew)
{
uint32_t data = 0;
gen_helper_ldst_us *fn = gen_helper_vsm_v;
/* EMUL = 1, NFIELDS = 1 */
data = FIELD_DP32(data, VDATA, LMUL, 0);
data = FIELD_DP32(data, VDATA, NF, 1);
return ldst_us_trans(a->rd, a->rs1, data, fn, s, true);
}
static bool st_us_mask_check(DisasContext *s, arg_vsm_v *a, uint8_t eew)
{
/* EMUL = 1, NFIELDS = 1 */
return require_rvv(s) && vext_check_isa_ill(s);
}
GEN_VEXT_TRANS(vlm_v, MO_8, vlm_v, ld_us_mask_op, ld_us_mask_check)
GEN_VEXT_TRANS(vsm_v, MO_8, vsm_v, st_us_mask_op, st_us_mask_check)
/*
*** stride load and store
*/