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vfio queue:
* Added property documentation * Added Minor fixes * Implemented basic PCI PM capability backing * Promoted new IGD maintainer * Deprecated vfio-plaform * Extended VFIO migration with multifd support -----BEGIN PGP SIGNATURE----- iQIyBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmfJrZoACgkQUaNDx8/7 7KFE2A/0Dmief9u/dDJIKGIDa+iawcf4hu8iX4v5pB0DlGniT3rgK8WMGnhDpPxq Q4wsKfo+JJ2q6msInrT7Ckqyydu9nQztI3vwmfMuWxLhTMyH28K96ptwPqIZBjOx rPTEXfnVX4W3tpn1+48S+vefWVa/gkBkIvv7RpK18rMBXv1kDeyOvc/d2dbAt7ft zJc4f8gH3jfQzGwmnYVZU1yPrZN7p6zhYR/AD3RQOY97swgZIEyYxXhOuTPiCuEC zC+2AMKi9nmnCG6x/mnk7l2yJXSlv7lJdqcjYZhJ9EOIYfiUGTREYIgQbARcafE/ 4KSg2QR35BoUd4YrmEWxXJCRf3XnyWXDY36dDKVhC0OHng1F/U44HuL4QxwoTIay s1SP/DHcvDiPAewVTvdgt7Iwfn9xGhcQO2pkrxBoNLB5JYwW+R6mG7WXeDv1o3GT QosTu1fXZezQqFd4v6+q5iRNS2KtBZLTspwAmVdywEFUs+ZLBRlC+bodYlinZw6B Yl/z0LfAEh4J55QmX2espbp8MH1+mALuW2H2tgSGSrTBX1nwxZFI5veFzPepgF2S eTx69BMjiNMwzIjq1T7e9NpDCceiW0fXDu7IK1MzYhqg1nM9lX9AidhFTeiF2DB2 EPb3ljy/8fyxcPKa1T9X47hQaSjbMwofaO8Snoh0q0jokY246Q== =hIBw -----END PGP SIGNATURE----- Merge tag 'pull-vfio-20250306' of https://github.com/legoater/qemu into staging vfio queue: * Added property documentation * Added Minor fixes * Implemented basic PCI PM capability backing * Promoted new IGD maintainer * Deprecated vfio-plaform * Extended VFIO migration with multifd support # -----BEGIN PGP SIGNATURE----- # # iQIyBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmfJrZoACgkQUaNDx8/7 # 7KFE2A/0Dmief9u/dDJIKGIDa+iawcf4hu8iX4v5pB0DlGniT3rgK8WMGnhDpPxq # Q4wsKfo+JJ2q6msInrT7Ckqyydu9nQztI3vwmfMuWxLhTMyH28K96ptwPqIZBjOx # rPTEXfnVX4W3tpn1+48S+vefWVa/gkBkIvv7RpK18rMBXv1kDeyOvc/d2dbAt7ft # zJc4f8gH3jfQzGwmnYVZU1yPrZN7p6zhYR/AD3RQOY97swgZIEyYxXhOuTPiCuEC # zC+2AMKi9nmnCG6x/mnk7l2yJXSlv7lJdqcjYZhJ9EOIYfiUGTREYIgQbARcafE/ # 4KSg2QR35BoUd4YrmEWxXJCRf3XnyWXDY36dDKVhC0OHng1F/U44HuL4QxwoTIay # s1SP/DHcvDiPAewVTvdgt7Iwfn9xGhcQO2pkrxBoNLB5JYwW+R6mG7WXeDv1o3GT # QosTu1fXZezQqFd4v6+q5iRNS2KtBZLTspwAmVdywEFUs+ZLBRlC+bodYlinZw6B # Yl/z0LfAEh4J55QmX2espbp8MH1+mALuW2H2tgSGSrTBX1nwxZFI5veFzPepgF2S # eTx69BMjiNMwzIjq1T7e9NpDCceiW0fXDu7IK1MzYhqg1nM9lX9AidhFTeiF2DB2 # EPb3ljy/8fyxcPKa1T9X47hQaSjbMwofaO8Snoh0q0jokY246Q== # =hIBw # -----END PGP SIGNATURE----- # gpg: Signature made Thu 06 Mar 2025 22:13:46 HKT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20250306' of https://github.com/legoater/qemu: (42 commits) hw/core/machine: Add compat for x-migration-multifd-transfer VFIO property vfio/migration: Make x-migration-multifd-transfer VFIO property mutable vfio/migration: Add x-migration-multifd-transfer VFIO property vfio/migration: Multifd device state transfer support - send side vfio/migration: Multifd device state transfer support - config loading support migration/qemu-file: Define g_autoptr() cleanup function for QEMUFile vfio/migration: Multifd device state transfer support - load thread vfio/migration: Multifd device state transfer support - received buffers queuing vfio/migration: Setup and cleanup multifd transfer in these general methods vfio/migration: Multifd setup/cleanup functions and associated VFIOMultifd vfio/migration: Multifd device state transfer - add support checking function vfio/migration: Multifd device state transfer support - basic types vfio/migration: Move migration channel flags to vfio-common.h header file vfio/migration: Add vfio_add_bytes_transferred() vfio/migration: Convert bytes_transferred counter to atomic vfio/migration: Add load_device_config_state_start trace event migration: Add save_live_complete_precopy_thread handler migration/multifd: Add multifd_device_state_supported() migration/multifd: Make MultiFDSendData a struct migration/multifd: Device state transfer support - send side ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
2400fad572
54 changed files with 2303 additions and 216 deletions
93
hw/pci/pci.c
93
hw/pci/pci.c
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@ -435,6 +435,84 @@ static void pci_msi_trigger(PCIDevice *dev, MSIMessage msg)
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attrs, NULL);
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}
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/*
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* Register and track a PM capability. If wmask is also enabled for the power
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* state field of the pmcsr register, guest writes may change the device PM
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* state. BAR access is only enabled while the device is in the D0 state.
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* Return the capability offset or negative error code.
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*/
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int pci_pm_init(PCIDevice *d, uint8_t offset, Error **errp)
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{
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int cap = pci_add_capability(d, PCI_CAP_ID_PM, offset, PCI_PM_SIZEOF, errp);
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if (cap < 0) {
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return cap;
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}
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d->pm_cap = cap;
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d->cap_present |= QEMU_PCI_CAP_PM;
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return cap;
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}
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static uint8_t pci_pm_state(PCIDevice *d)
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{
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uint16_t pmcsr;
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if (!(d->cap_present & QEMU_PCI_CAP_PM)) {
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return 0;
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}
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pmcsr = pci_get_word(d->config + d->pm_cap + PCI_PM_CTRL);
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return pmcsr & PCI_PM_CTRL_STATE_MASK;
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}
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/*
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* Update the PM capability state based on the new value stored in config
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* space respective to the old, pre-write state provided. If the new value
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* is rejected (unsupported or invalid transition) restore the old value.
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* Return the resulting PM state.
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*/
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static uint8_t pci_pm_update(PCIDevice *d, uint32_t addr, int l, uint8_t old)
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{
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uint16_t pmc;
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uint8_t new;
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if (!(d->cap_present & QEMU_PCI_CAP_PM) ||
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!range_covers_byte(addr, l, d->pm_cap + PCI_PM_CTRL)) {
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return old;
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}
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new = pci_pm_state(d);
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if (new == old) {
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return old;
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}
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pmc = pci_get_word(d->config + d->pm_cap + PCI_PM_PMC);
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/*
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* Transitions to D1 & D2 are only allowed if supported. Devices may
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* only transition to higher D-states or to D0.
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*/
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if ((!(pmc & PCI_PM_CAP_D1) && new == 1) ||
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(!(pmc & PCI_PM_CAP_D2) && new == 2) ||
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(old && new && new < old)) {
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pci_word_test_and_clear_mask(d->config + d->pm_cap + PCI_PM_CTRL,
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PCI_PM_CTRL_STATE_MASK);
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pci_word_test_and_set_mask(d->config + d->pm_cap + PCI_PM_CTRL,
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old);
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trace_pci_pm_bad_transition(d->name, pci_dev_bus_num(d),
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PCI_SLOT(d->devfn), PCI_FUNC(d->devfn),
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old, new);
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return old;
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}
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trace_pci_pm_transition(d->name, pci_dev_bus_num(d), PCI_SLOT(d->devfn),
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PCI_FUNC(d->devfn), old, new);
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return new;
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}
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static void pci_reset_regions(PCIDevice *dev)
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{
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int r;
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@ -474,6 +552,11 @@ static void pci_do_device_reset(PCIDevice *dev)
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pci_get_word(dev->wmask + PCI_INTERRUPT_LINE) |
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pci_get_word(dev->w1cmask + PCI_INTERRUPT_LINE));
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dev->config[PCI_CACHE_LINE_SIZE] = 0x0;
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/* Default PM state is D0 */
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if (dev->cap_present & QEMU_PCI_CAP_PM) {
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pci_word_test_and_clear_mask(dev->config + dev->pm_cap + PCI_PM_CTRL,
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PCI_PM_CTRL_STATE_MASK);
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}
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pci_reset_regions(dev);
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pci_update_mappings(dev);
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@ -1606,7 +1689,7 @@ static void pci_update_mappings(PCIDevice *d)
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continue;
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new_addr = pci_bar_address(d, i, r->type, r->size);
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if (!d->enabled) {
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if (!d->enabled || pci_pm_state(d)) {
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new_addr = PCI_BAR_UNMAPPED;
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}
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@ -1672,6 +1755,7 @@ uint32_t pci_default_read_config(PCIDevice *d,
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void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int l)
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{
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uint8_t new_pm_state, old_pm_state = pci_pm_state(d);
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int i, was_irq_disabled = pci_irq_disabled(d);
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uint32_t val = val_in;
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@ -1684,11 +1768,16 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int
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d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask);
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d->config[addr + i] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */
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}
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new_pm_state = pci_pm_update(d, addr, l, old_pm_state);
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if (ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) ||
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ranges_overlap(addr, l, PCI_ROM_ADDRESS, 4) ||
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ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) ||
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range_covers_byte(addr, l, PCI_COMMAND))
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range_covers_byte(addr, l, PCI_COMMAND) ||
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!!new_pm_state != !!old_pm_state) {
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pci_update_mappings(d);
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}
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if (ranges_overlap(addr, l, PCI_COMMAND, 2)) {
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pci_update_irq_disabled(d, was_irq_disabled);
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@ -1,6 +1,8 @@
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# See docs/devel/tracing.rst for syntax documentation.
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# pci.c
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pci_pm_bad_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) "%s %02x:%02x.%x REJECTED PM transition D%d->D%d"
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pci_pm_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) "%s %02x:%02x.%x PM transition D%d->D%d"
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pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
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pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
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pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) "IRQ %d @%s -> IRQ %d @%s"
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