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target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0
we would crash if width was 0 for these insns, as tcg_gen_deposit() is undefined for that case. For TriCore, width = 0 is a mov from the src reg to the dst reg, so we special case this here. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-9-kbastian@mail.uni-paderborn.de>
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3 changed files with 32 additions and 2 deletions
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@ -5310,8 +5310,11 @@ static void decode_rcpw_insert(DisasContext *ctx)
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}
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break;
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case OPC2_32_RCPW_INSERT:
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/* tcg_gen_deposit_tl() does not handle the case of width = 0 */
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if (width == 0) {
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tcg_gen_mov_tl(cpu_gpr_d[r2], cpu_gpr_d[r1]);
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/* if pos + width > 32 undefined result */
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if (pos + width <= 32) {
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} else if (pos + width <= 32) {
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temp = tcg_constant_i32(const4);
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tcg_gen_deposit_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp, pos, width);
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}
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@ -6571,7 +6574,10 @@ static void decode_rrpw_extract_insert(DisasContext *ctx)
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break;
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case OPC2_32_RRPW_INSERT:
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if (pos + width <= 32) {
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/* tcg_gen_deposit_tl() does not handle the case of width = 0 */
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if (width == 0) {
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tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]);
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} else if (pos + width <= 32) {
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tcg_gen_deposit_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
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pos, width);
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}
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