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Save/restore for stellaris boards.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4824 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2008-07-02 16:48:32 +00:00
parent ab19b0ecfd
commit 23e3929403
12 changed files with 761 additions and 14 deletions
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49
hw/arm_timer.c
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@ -143,6 +143,29 @@ static void arm_timer_tick(void *opaque)
arm_timer_update(s);
}
static void arm_timer_save(QEMUFile *f, void *opaque)
{
arm_timer_state *s = (arm_timer_state *)opaque;
qemu_put_be32(f, s->control);
qemu_put_be32(f, s->limit);
qemu_put_be32(f, s->int_level);
qemu_put_ptimer(f, s->timer);
}
static int arm_timer_load(QEMUFile *f, void *opaque, int version_id)
{
arm_timer_state *s = (arm_timer_state *)opaque;
if (version_id != 1)
return -EINVAL;
s->control = qemu_get_be32(f);
s->limit = qemu_get_be32(f);
s->int_level = qemu_get_be32(f);
qemu_get_ptimer(f, s->timer);
return 0;
}
static void *arm_timer_init(uint32_t freq, qemu_irq irq)
{
arm_timer_state *s;
@ -155,7 +178,7 @@ static void *arm_timer_init(uint32_t freq, qemu_irq irq)
bh = qemu_bh_new(arm_timer_tick, s);
s->timer = ptimer_init(bh);
/* ??? Save/restore. */
register_savevm("arm_timer", -1, 1, arm_timer_save, arm_timer_load, s);
return s;
}
@ -218,6 +241,25 @@ static CPUWriteMemoryFunc *sp804_writefn[] = {
sp804_write
};
static void sp804_save(QEMUFile *f, void *opaque)
{
sp804_state *s = (sp804_state *)opaque;
qemu_put_be32(f, s->level[0]);
qemu_put_be32(f, s->level[1]);
}
static int sp804_load(QEMUFile *f, void *opaque, int version_id)
{
sp804_state *s = (sp804_state *)opaque;
if (version_id != 1)
return -EINVAL;
s->level[0] = qemu_get_be32(f);
s->level[1] = qemu_get_be32(f);
return 0;
}
void sp804_init(uint32_t base, qemu_irq irq)
{
int iomemtype;
@ -235,7 +277,7 @@ void sp804_init(uint32_t base, qemu_irq irq)
iomemtype = cpu_register_io_memory(0, sp804_readfn,
sp804_writefn, s);
cpu_register_physical_memory(base, 0x00001000, iomemtype);
/* ??? Save/restore. */
register_savevm("sp804", -1, 1, sp804_save, sp804_load, s);
}
@ -303,6 +345,7 @@ void icp_pit_init(uint32_t base, qemu_irq *pic, int irq)
iomemtype = cpu_register_io_memory(0, icp_pit_readfn,
icp_pit_writefn, s);
cpu_register_physical_memory(base, 0x00001000, iomemtype);
/* ??? Save/restore. */
/* This device has no state to save/restore. The component timers will
save themselves. */
}