target-i386: fix SSE rounding and flush to zero

SSE rounding and flush to zero control has never been implemented. However
given that softfloat-native was using a single state for FPU and SSE and
given that glibc is setting both FPU and SSE state in fesetround(), this
was working correctly up to the switch to softfloat.

Fix that by adding an update_sse_status() function similar to
update_fpu_status(), and callin git on write to mxcsr.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2012-01-07 15:20:12 +01:00
parent 170d5b4bb9
commit 2355c16e74
3 changed files with 56 additions and 11 deletions

View file

@ -197,6 +197,7 @@ DEF_HELPER_2(lzcnt, tl, tl, int)
/* MMX/SSE */
DEF_HELPER_1(ldmxcsr, void, i32)
DEF_HELPER_0(enter_mmx, void)
DEF_HELPER_0(emms, void)
DEF_HELPER_2(movq, void, ptr, ptr)