mirror of
https://github.com/Motorhead1991/qemu.git
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-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJaTlhMAAoJEPMMOL0/L748xsMQAIcRxsab41rsDuTVE3LU9OlW DKVO8O8gqG/l2QlFVAHphg5/w1d1CqTVQE5pFu6qf+/O1V2mcO95g9ZaIRQ2Rt/C blstw+D6xxxqaBe3EFnbuWUGrfdp6Mc8rfR/HtG8J5quNucMX/IpnKVSYxDqql6m gCDwT/N9hGMfEIW+QdcTh3tSpT4D1fWyJSbWWpM02necmAvg+mSvcJ8qQ8uYVyA5 Yc0OjSMZix9SFTn/QSKeh2+ofv+0HpauOLIGBcZ44xw0N40NiRhMFDITwyuv/rY6 tA8cQFw2OhwX7J9tbW4h4Jq8zyFjlarZfHFAij+X0mC2Id58KZaCcsCLlOhbR3x9 EA6Rtd9UKLHlrQfSLuB/bcJ3LgjxkiEjoooBHeFYofqhcW5A3Uk5FxxnMO5kYodZ yWOLZ3r7i9mzDHPECfNvKRIyC0IWp+hsZqC9UQt51/vupwAMq1EGYOJ2HBBpa0PS QSIAQX2XhKj/0yCAXM4nTKqAE9h6UKHNNmYoxJvPUsF7/Bobahr3sDZAepuuGADP b4l95pZ/Gjqm5d8S9I/A6zIm5vV8Fp0BMozhigNQ4e9yGpKapyOYZPiIgNb8wj0L /6Pqq9zoD8jbszg2H9/0kPTt57NjSMgqgHNRWfvvY8zL2LkvGxzpLmOe80BQcjYe CxWyb6Y53IWR6F3CXpnj =42iq -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.12-pull-request' into staging # gpg: Signature made Thu 04 Jan 2018 16:37:32 GMT # gpg: using RSA key 0xF30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-2.12-pull-request: target/m68k: fix m68k_cpu_dump_state() target/m68k: add the Interrupt Stack Pointer target/m68k: add andi/ori/eori to SR/CCR target/m68k: add 680x0 "move to SR" instruction target/m68k: move CCR/SR functions target/m68k: implement fsave/frestore target/m68k: add reset target/m68k: add cpush/cinv target/m68k: softmmu cleanup target/m68k: add move16 target/m68k: add chk and chk2 target/m68k: manage 680x0 stack frames target/m68k: add CPU_LOG_INT trace target/m68k: use insn_pc to generate instruction fault address linux-user, m68k: correctly manage SR in context target/m68k: fix gen_get_ccr() target-m68k: sync CC_OP before gen_jmp_tb() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
232e5537e4
10 changed files with 937 additions and 129 deletions
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@ -51,7 +51,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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}
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}
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static void do_rte(CPUM68KState *env)
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static void cf_rte(CPUM68KState *env)
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{
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uint32_t sp;
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uint32_t fmt;
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@ -62,13 +62,158 @@ static void do_rte(CPUM68KState *env)
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sp |= (fmt >> 28) & 3;
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env->aregs[7] = sp + 8;
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helper_set_sr(env, fmt);
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cpu_m68k_set_sr(env, fmt);
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}
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static void do_interrupt_all(CPUM68KState *env, int is_hw)
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static void m68k_rte(CPUM68KState *env)
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{
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uint32_t sp;
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uint16_t fmt;
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uint16_t sr;
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sp = env->aregs[7];
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throwaway:
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sr = cpu_lduw_kernel(env, sp);
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sp += 2;
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env->pc = cpu_ldl_kernel(env, sp);
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sp += 4;
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if (m68k_feature(env, M68K_FEATURE_QUAD_MULDIV)) {
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/* all except 68000 */
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fmt = cpu_lduw_kernel(env, sp);
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sp += 2;
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switch (fmt >> 12) {
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case 0:
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break;
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case 1:
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env->aregs[7] = sp;
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cpu_m68k_set_sr(env, sr);
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goto throwaway;
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case 2:
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case 3:
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sp += 4;
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break;
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case 4:
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sp += 8;
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break;
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case 7:
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sp += 52;
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break;
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}
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}
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env->aregs[7] = sp;
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cpu_m68k_set_sr(env, sr);
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}
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static const char *m68k_exception_name(int index)
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{
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switch (index) {
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case EXCP_ACCESS:
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return "Access Fault";
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case EXCP_ADDRESS:
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return "Address Error";
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case EXCP_ILLEGAL:
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return "Illegal Instruction";
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case EXCP_DIV0:
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return "Divide by Zero";
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case EXCP_CHK:
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return "CHK/CHK2";
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case EXCP_TRAPCC:
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return "FTRAPcc, TRAPcc, TRAPV";
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case EXCP_PRIVILEGE:
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return "Privilege Violation";
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case EXCP_TRACE:
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return "Trace";
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case EXCP_LINEA:
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return "A-Line";
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case EXCP_LINEF:
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return "F-Line";
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case EXCP_DEBEGBP: /* 68020/030 only */
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return "Copro Protocol Violation";
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case EXCP_FORMAT:
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return "Format Error";
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case EXCP_UNINITIALIZED:
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return "Unitialized Interruot";
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case EXCP_SPURIOUS:
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return "Spurious Interrupt";
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case EXCP_INT_LEVEL_1:
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return "Level 1 Interrupt";
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case EXCP_INT_LEVEL_1 + 1:
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return "Level 2 Interrupt";
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case EXCP_INT_LEVEL_1 + 2:
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return "Level 3 Interrupt";
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case EXCP_INT_LEVEL_1 + 3:
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return "Level 4 Interrupt";
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case EXCP_INT_LEVEL_1 + 4:
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return "Level 5 Interrupt";
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case EXCP_INT_LEVEL_1 + 5:
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return "Level 6 Interrupt";
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case EXCP_INT_LEVEL_1 + 6:
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return "Level 7 Interrupt";
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case EXCP_TRAP0:
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return "TRAP #0";
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case EXCP_TRAP0 + 1:
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return "TRAP #1";
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case EXCP_TRAP0 + 2:
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return "TRAP #2";
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case EXCP_TRAP0 + 3:
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return "TRAP #3";
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case EXCP_TRAP0 + 4:
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return "TRAP #4";
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case EXCP_TRAP0 + 5:
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return "TRAP #5";
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case EXCP_TRAP0 + 6:
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return "TRAP #6";
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case EXCP_TRAP0 + 7:
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return "TRAP #7";
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case EXCP_TRAP0 + 8:
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return "TRAP #8";
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case EXCP_TRAP0 + 9:
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return "TRAP #9";
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case EXCP_TRAP0 + 10:
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return "TRAP #10";
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case EXCP_TRAP0 + 11:
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return "TRAP #11";
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case EXCP_TRAP0 + 12:
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return "TRAP #12";
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case EXCP_TRAP0 + 13:
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return "TRAP #13";
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case EXCP_TRAP0 + 14:
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return "TRAP #14";
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case EXCP_TRAP0 + 15:
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return "TRAP #15";
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case EXCP_FP_BSUN:
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return "FP Branch/Set on unordered condition";
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case EXCP_FP_INEX:
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return "FP Inexact Result";
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case EXCP_FP_DZ:
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return "FP Divide by Zero";
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case EXCP_FP_UNFL:
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return "FP Underflow";
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case EXCP_FP_OPERR:
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return "FP Operand Error";
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case EXCP_FP_OVFL:
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return "FP Overflow";
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case EXCP_FP_SNAN:
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return "FP Signaling NAN";
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case EXCP_FP_UNIMP:
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return "FP Unimplemented Data Type";
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case EXCP_MMU_CONF: /* 68030/68851 only */
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return "MMU Configuration Error";
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case EXCP_MMU_ILLEGAL: /* 68851 only */
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return "MMU Illegal Operation";
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case EXCP_MMU_ACCESS: /* 68851 only */
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return "MMU Access Level Violation";
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case 64 ... 255:
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return "User Defined Vector";
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}
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return "Unassigned";
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}
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static void cf_interrupt_all(CPUM68KState *env, int is_hw)
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{
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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uint32_t sp;
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uint32_t sr;
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uint32_t fmt;
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uint32_t retaddr;
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uint32_t vector;
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@ -80,7 +225,7 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
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switch (cs->exception_index) {
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case EXCP_RTE:
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/* Return from an exception. */
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do_rte(env);
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cf_rte(env);
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return;
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case EXCP_HALT_INSN:
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if (semihosting_enabled()
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@ -106,10 +251,17 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
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vector = cs->exception_index << 2;
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sr = env->sr | cpu_m68k_get_ccr(env);
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if (qemu_loglevel_mask(CPU_LOG_INT)) {
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static int count;
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qemu_log("INT %6d: %s(%#x) pc=%08x sp=%08x sr=%04x\n",
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++count, m68k_exception_name(cs->exception_index),
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vector, env->pc, env->aregs[7], sr);
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}
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fmt |= 0x40000000;
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fmt |= vector << 16;
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fmt |= env->sr;
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fmt |= cpu_m68k_get_ccr(env);
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fmt |= sr;
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env->sr |= SR_S;
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if (is_hw) {
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@ -131,6 +283,119 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
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env->pc = cpu_ldl_kernel(env, env->vbr + vector);
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}
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static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp,
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uint16_t format, uint16_t sr,
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uint32_t addr, uint32_t retaddr)
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{
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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switch (format) {
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case 4:
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*sp -= 4;
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cpu_stl_kernel(env, *sp, env->pc);
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*sp -= 4;
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cpu_stl_kernel(env, *sp, addr);
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break;
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case 3:
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case 2:
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*sp -= 4;
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cpu_stl_kernel(env, *sp, addr);
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break;
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}
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*sp -= 2;
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cpu_stw_kernel(env, *sp, (format << 12) + (cs->exception_index << 2));
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*sp -= 4;
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cpu_stl_kernel(env, *sp, retaddr);
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*sp -= 2;
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cpu_stw_kernel(env, *sp, sr);
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}
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static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
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{
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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uint32_t sp;
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uint32_t retaddr;
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uint32_t vector;
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uint16_t sr, oldsr;
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retaddr = env->pc;
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if (!is_hw) {
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switch (cs->exception_index) {
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case EXCP_RTE:
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/* Return from an exception. */
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m68k_rte(env);
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return;
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case EXCP_TRAP0 ... EXCP_TRAP15:
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/* Move the PC after the trap instruction. */
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retaddr += 2;
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break;
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}
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}
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vector = cs->exception_index << 2;
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sr = env->sr | cpu_m68k_get_ccr(env);
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if (qemu_loglevel_mask(CPU_LOG_INT)) {
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static int count;
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qemu_log("INT %6d: %s(%#x) pc=%08x sp=%08x sr=%04x\n",
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++count, m68k_exception_name(cs->exception_index),
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vector, env->pc, env->aregs[7], sr);
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}
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/*
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* MC68040UM/AD, chapter 9.3.10
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*/
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/* "the processor first make an internal copy" */
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oldsr = sr;
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/* "set the mode to supervisor" */
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sr |= SR_S;
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/* "suppress tracing" */
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sr &= ~SR_T;
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/* "sets the processor interrupt mask" */
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if (is_hw) {
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sr |= (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
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}
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cpu_m68k_set_sr(env, sr);
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sp = env->aregs[7];
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sp &= ~1;
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if (cs->exception_index == EXCP_ADDRESS) {
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do_stack_frame(env, &sp, 2, oldsr, 0, retaddr);
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} else if (cs->exception_index == EXCP_ILLEGAL ||
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cs->exception_index == EXCP_DIV0 ||
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cs->exception_index == EXCP_CHK ||
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cs->exception_index == EXCP_TRAPCC ||
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cs->exception_index == EXCP_TRACE) {
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/* FIXME: addr is not only env->pc */
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do_stack_frame(env, &sp, 2, oldsr, env->pc, retaddr);
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} else if (is_hw && oldsr & SR_M &&
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cs->exception_index >= EXCP_SPURIOUS &&
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cs->exception_index <= EXCP_INT_LEVEL_7) {
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do_stack_frame(env, &sp, 0, oldsr, 0, retaddr);
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oldsr = sr;
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env->aregs[7] = sp;
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cpu_m68k_set_sr(env, sr &= ~SR_M);
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sp = env->aregs[7] & ~1;
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do_stack_frame(env, &sp, 1, oldsr, 0, retaddr);
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} else {
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do_stack_frame(env, &sp, 0, oldsr, 0, retaddr);
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}
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env->aregs[7] = sp;
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/* Jump to vector. */
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env->pc = cpu_ldl_kernel(env, env->vbr + vector);
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}
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static void do_interrupt_all(CPUM68KState *env, int is_hw)
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{
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if (m68k_feature(env, M68K_FEATURE_M68000)) {
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m68k_interrupt_all(env, is_hw);
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return;
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}
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cf_interrupt_all(env, is_hw);
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}
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void m68k_cpu_do_interrupt(CPUState *cs)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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@ -679,3 +944,64 @@ uint64_t HELPER(bfffo_mem)(CPUM68KState *env, uint32_t addr,
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is already zero. */
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return n | ffo;
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}
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void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub)
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{
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/* From the specs:
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* X: Not affected, C,V,Z: Undefined,
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* N: Set if val < 0; cleared if val > ub, undefined otherwise
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* We implement here values found from a real MC68040:
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* X,V,Z: Not affected
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* N: Set if val < 0; cleared if val >= 0
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* C: if 0 <= ub: set if val < 0 or val > ub, cleared otherwise
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* if 0 > ub: set if val > ub and val < 0, cleared otherwise
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*/
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env->cc_n = val;
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env->cc_c = 0 <= ub ? val < 0 || val > ub : val > ub && val < 0;
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if (val < 0 || val > ub) {
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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/* Recover PC and CC_OP for the beginning of the insn. */
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cpu_restore_state(cs, GETPC());
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/* flags have been modified by gen_flush_flags() */
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env->cc_op = CC_OP_FLAGS;
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/* Adjust PC to end of the insn. */
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env->pc += 2;
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cs->exception_index = EXCP_CHK;
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cpu_loop_exit(cs);
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}
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}
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void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub)
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{
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/* From the specs:
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* X: Not affected, N,V: Undefined,
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* Z: Set if val is equal to lb or ub
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* C: Set if val < lb or val > ub, cleared otherwise
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* We implement here values found from a real MC68040:
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* X,N,V: Not affected
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* Z: Set if val is equal to lb or ub
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* C: if lb <= ub: set if val < lb or val > ub, cleared otherwise
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* if lb > ub: set if val > ub and val < lb, cleared otherwise
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*/
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env->cc_z = val != lb && val != ub;
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env->cc_c = lb <= ub ? val < lb || val > ub : val > ub && val < lb;
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if (env->cc_c) {
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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/* Recover PC and CC_OP for the beginning of the insn. */
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cpu_restore_state(cs, GETPC());
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/* flags have been modified by gen_flush_flags() */
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env->cc_op = CC_OP_FLAGS;
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/* Adjust PC to end of the insn. */
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env->pc += 4;
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cs->exception_index = EXCP_CHK;
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cpu_loop_exit(cs);
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}
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}
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|
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Loading…
Add table
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Reference in a new issue