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hw/cxl/mbox: Add support for background operations
Support background commands in the mailbox, and update cmd_infostat_bg_op_sts() accordingly. This patch does not implement mbox interrupts upon completion, so the kernel driver must rely on polling to know when the operation is done. Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-12-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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892e3479d7
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3 changed files with 122 additions and 4 deletions
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@ -82,6 +82,25 @@ static uint64_t mailbox_reg_read(void *opaque, hwaddr offset, unsigned size)
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case 4:
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return cxl_dstate->mbox_reg_state32[offset / size];
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case 8:
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if (offset == A_CXL_DEV_BG_CMD_STS) {
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uint64_t bg_status_reg;
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bg_status_reg = FIELD_DP64(0, CXL_DEV_BG_CMD_STS, OP,
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cci->bg.opcode);
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bg_status_reg = FIELD_DP64(bg_status_reg, CXL_DEV_BG_CMD_STS,
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PERCENTAGE_COMP, cci->bg.complete_pct);
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bg_status_reg = FIELD_DP64(bg_status_reg, CXL_DEV_BG_CMD_STS,
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RET_CODE, cci->bg.ret_code);
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/* endian? */
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cxl_dstate->mbox_reg_state64[offset / size] = bg_status_reg;
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}
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if (offset == A_CXL_DEV_MAILBOX_STS) {
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uint64_t status_reg = cxl_dstate->mbox_reg_state64[offset / size];
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if (cci->bg.complete_pct) {
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status_reg = FIELD_DP64(status_reg, CXL_DEV_MAILBOX_STS, BG_OP,
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0);
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cxl_dstate->mbox_reg_state64[offset / size] = status_reg;
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}
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}
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return cxl_dstate->mbox_reg_state64[offset / size];
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default:
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g_assert_not_reached();
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@ -114,8 +133,7 @@ static void mailbox_mem_writeq(uint64_t *reg_state, hwaddr offset,
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case A_CXL_DEV_MAILBOX_CMD:
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break;
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case A_CXL_DEV_BG_CMD_STS:
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/* BG not supported */
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/* fallthrough */
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break;
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case A_CXL_DEV_MAILBOX_STS:
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/* Read only register, will get updated by the state machine */
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return;
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@ -339,7 +357,7 @@ static void device_reg_init_common(CXLDeviceState *cxl_dstate)
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static void mailbox_reg_init_common(CXLDeviceState *cxl_dstate)
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{
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/* 2048 payload size, with no interrupt or background support */
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/* 2048 payload size, with no interrupt */
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ARRAY_FIELD_DP32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CAP,
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PAYLOAD_SIZE, CXL_MAILBOX_PAYLOAD_SHIFT);
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cxl_dstate->payload_size = CXL_MAILBOX_MAX_PAYLOAD_SIZE;
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