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hw/arm: xlnx-zynqmp: Clean up coding convention issues
There are some coding convention warnings in xlnx-zynqmp.c and xlnx-zynqmp.h, as reported by: $ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h $ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c Let's clean them up. Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com> Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20210303135254.3970-3-bmeng.cn@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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35593573b2
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2 changed files with 8 additions and 4 deletions
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@ -301,11 +301,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
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ram_size = memory_region_size(s->ddr_ram);
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ram_size = memory_region_size(s->ddr_ram);
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/* Create the DDR Memory Regions. User friendly checks should happen at
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/*
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* Create the DDR Memory Regions. User friendly checks should happen at
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* the board level
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* the board level
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*/
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*/
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if (ram_size > XLNX_ZYNQMP_MAX_LOW_RAM_SIZE) {
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if (ram_size > XLNX_ZYNQMP_MAX_LOW_RAM_SIZE) {
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/* The RAM size is above the maximum available for the low DDR.
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/*
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* The RAM size is above the maximum available for the low DDR.
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* Create the high DDR memory region as well.
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* Create the high DDR memory region as well.
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*/
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*/
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assert(ram_size <= XLNX_ZYNQMP_MAX_RAM_SIZE);
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assert(ram_size <= XLNX_ZYNQMP_MAX_RAM_SIZE);
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@ -521,7 +523,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
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SysBusDevice *sbd = SYS_BUS_DEVICE(&s->sdhci[i]);
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SysBusDevice *sbd = SYS_BUS_DEVICE(&s->sdhci[i]);
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Object *sdhci = OBJECT(&s->sdhci[i]);
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Object *sdhci = OBJECT(&s->sdhci[i]);
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/* Compatible with:
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/*
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* Compatible with:
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* - SD Host Controller Specification Version 3.00
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* - SD Host Controller Specification Version 3.00
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* - SDIO Specification Version 3.0
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* - SDIO Specification Version 3.0
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* - eMMC Specification Version 4.51
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* - eMMC Specification Version 4.51
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@ -60,7 +60,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
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#define XLNX_ZYNQMP_GIC_REGIONS 6
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#define XLNX_ZYNQMP_GIC_REGIONS 6
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/* ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k offsets
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/*
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* ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k offsets
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* and under-decodes the 64k region. This mirrors the 4k regions to every 4k
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* and under-decodes the 64k region. This mirrors the 4k regions to every 4k
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* aligned address in the 64k region. To implement each GIC region needs a
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* aligned address in the 64k region. To implement each GIC region needs a
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* number of memory region aliases.
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* number of memory region aliases.
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