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exec: Make stl_phys_notdirty input an AddressSpace

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
Edgar E. Iglesias 2013-11-28 10:13:41 +01:00
parent ab1da85791
commit 2198a12143
6 changed files with 18 additions and 17 deletions
Download patch file Download diff file Expand all files Collapse all files

4
exec.c
View file

@ -2534,14 +2534,14 @@ uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr)
/* warning: addr must be aligned. The ram page is not masked as dirty /* warning: addr must be aligned. The ram page is not masked as dirty
and the code inside is not invalidated. It is useful if the dirty and the code inside is not invalidated. It is useful if the dirty
bits are used to track modified PTEs */ bits are used to track modified PTEs */
void stl_phys_notdirty(hwaddr addr, uint32_t val) void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
{ {
uint8_t *ptr; uint8_t *ptr;
MemoryRegion *mr; MemoryRegion *mr;
hwaddr l = 4; hwaddr l = 4;
hwaddr addr1; hwaddr addr1;
mr = address_space_translate(&address_space_memory, addr, &addr1, &l, mr = address_space_translate(as, addr, &addr1, &l,
true); true);
if (l < 4 || !memory_access_is_direct(mr, true)) { if (l < 4 || !memory_access_is_direct(mr, true)) {
io_mem_write(mr, addr1, val, 4); io_mem_write(mr, addr1, val, 4);

5
hw/arm/boot.c
View file

@ -16,6 +16,7 @@
#include "elf.h" #include "elf.h"
#include "sysemu/device_tree.h" #include "sysemu/device_tree.h"
#include "qemu/config-file.h" #include "qemu/config-file.h"
#include "exec/address-spaces.h"
/* Kernel boot protocol is specified in the kernel docs /* Kernel boot protocol is specified in the kernel docs
* Documentation/arm/Booting and Documentation/arm64/booting.txt * Documentation/arm/Booting and Documentation/arm64/booting.txt
@ -169,7 +170,7 @@ static void default_reset_secondary(ARMCPU *cpu,
{ {
CPUARMState *env = &cpu->env; CPUARMState *env = &cpu->env;
stl_phys_notdirty(info->smp_bootreg_addr, 0); stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0);
env->regs[15] = info->smp_loader_start; env->regs[15] = info->smp_loader_start;
} }
@ -179,7 +180,7 @@ static inline bool have_dtb(const struct arm_boot_info *info)
} }
#define WRITE_WORD(p, value) do { \ #define WRITE_WORD(p, value) do { \
stl_phys_notdirty(p, value); \ stl_phys_notdirty(&address_space_memory, p, value); \
p += 4; \ p += 4; \
} while (0) } while (0)

6
hw/arm/highbank.c
View file

@ -69,11 +69,11 @@ static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
switch (info->nb_cpus) { switch (info->nb_cpus) {
case 4: case 4:
stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0); stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x30, 0);
case 3: case 3:
stl_phys_notdirty(SMP_BOOT_REG + 0x20, 0); stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x20, 0);
case 2: case 2:
stl_phys_notdirty(SMP_BOOT_REG + 0x10, 0); stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x10, 0);
env->regs[15] = SMP_BOOT_ADDR; env->regs[15] = SMP_BOOT_ADDR;
break; break;
default: default:

2
include/exec/cpu-common.h
View file

@ -102,7 +102,7 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
uint32_t lduw_phys(AddressSpace *as, hwaddr addr); uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
uint32_t ldl_phys(AddressSpace *as, hwaddr addr); uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
uint64_t ldq_phys(AddressSpace *as, hwaddr addr); uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
void stl_phys_notdirty(hwaddr addr, uint32_t val); void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
void stw_phys(hwaddr addr, uint32_t val); void stw_phys(hwaddr addr, uint32_t val);
void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val); void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val); void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);

16
target-i386/helper.c
View file

@ -574,7 +574,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
} }
if (!(pml4e & PG_ACCESSED_MASK)) { if (!(pml4e & PG_ACCESSED_MASK)) {
pml4e |= PG_ACCESSED_MASK; pml4e |= PG_ACCESSED_MASK;
stl_phys_notdirty(pml4e_addr, pml4e); stl_phys_notdirty(cs->as, pml4e_addr, pml4e);
} }
ptep = pml4e ^ PG_NX_MASK; ptep = pml4e ^ PG_NX_MASK;
pdpe_addr = ((pml4e & PHYS_ADDR_MASK) + (((addr >> 30) & 0x1ff) << 3)) & pdpe_addr = ((pml4e & PHYS_ADDR_MASK) + (((addr >> 30) & 0x1ff) << 3)) &
@ -591,7 +591,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
ptep &= pdpe ^ PG_NX_MASK; ptep &= pdpe ^ PG_NX_MASK;
if (!(pdpe & PG_ACCESSED_MASK)) { if (!(pdpe & PG_ACCESSED_MASK)) {
pdpe |= PG_ACCESSED_MASK; pdpe |= PG_ACCESSED_MASK;
stl_phys_notdirty(pdpe_addr, pdpe); stl_phys_notdirty(cs->as, pdpe_addr, pdpe);
} }
} else } else
#endif #endif
@ -661,7 +661,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
pde |= PG_ACCESSED_MASK; pde |= PG_ACCESSED_MASK;
if (is_dirty) if (is_dirty)
pde |= PG_DIRTY_MASK; pde |= PG_DIRTY_MASK;
stl_phys_notdirty(pde_addr, pde); stl_phys_notdirty(cs->as, pde_addr, pde);
} }
/* align to page_size */ /* align to page_size */
pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff); pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff);
@ -670,7 +670,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
/* 4 KB page */ /* 4 KB page */
if (!(pde & PG_ACCESSED_MASK)) { if (!(pde & PG_ACCESSED_MASK)) {
pde |= PG_ACCESSED_MASK; pde |= PG_ACCESSED_MASK;
stl_phys_notdirty(pde_addr, pde); stl_phys_notdirty(cs->as, pde_addr, pde);
} }
pte_addr = ((pde & PHYS_ADDR_MASK) + (((addr >> 12) & 0x1ff) << 3)) & pte_addr = ((pde & PHYS_ADDR_MASK) + (((addr >> 12) & 0x1ff) << 3)) &
env->a20_mask; env->a20_mask;
@ -723,7 +723,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
pte |= PG_ACCESSED_MASK; pte |= PG_ACCESSED_MASK;
if (is_dirty) if (is_dirty)
pte |= PG_DIRTY_MASK; pte |= PG_DIRTY_MASK;
stl_phys_notdirty(pte_addr, pte); stl_phys_notdirty(cs->as, pte_addr, pte);
} }
page_size = 4096; page_size = 4096;
virt_addr = addr & ~0xfff; virt_addr = addr & ~0xfff;
@ -778,7 +778,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
pde |= PG_ACCESSED_MASK; pde |= PG_ACCESSED_MASK;
if (is_dirty) if (is_dirty)
pde |= PG_DIRTY_MASK; pde |= PG_DIRTY_MASK;
stl_phys_notdirty(pde_addr, pde); stl_phys_notdirty(cs->as, pde_addr, pde);
} }
pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */ pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */
@ -787,7 +787,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
} else { } else {
if (!(pde & PG_ACCESSED_MASK)) { if (!(pde & PG_ACCESSED_MASK)) {
pde |= PG_ACCESSED_MASK; pde |= PG_ACCESSED_MASK;
stl_phys_notdirty(pde_addr, pde); stl_phys_notdirty(cs->as, pde_addr, pde);
} }
/* page directory entry */ /* page directory entry */
@ -835,7 +835,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
pte |= PG_ACCESSED_MASK; pte |= PG_ACCESSED_MASK;
if (is_dirty) if (is_dirty)
pte |= PG_DIRTY_MASK; pte |= PG_DIRTY_MASK;
stl_phys_notdirty(pte_addr, pte); stl_phys_notdirty(cs->as, pte_addr, pte);
} }
page_size = 4096; page_size = 4096;
virt_addr = addr & ~0xfff; virt_addr = addr & ~0xfff;

2
target-sparc/mmu_helper.c
View file

@ -180,7 +180,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
if (is_dirty) { if (is_dirty) {
pde |= PG_MODIFIED_MASK; pde |= PG_MODIFIED_MASK;
} }
stl_phys_notdirty(pde_ptr, pde); stl_phys_notdirty(cs->as, pde_ptr, pde);
} }
/* the page can be put in the TLB */ /* the page can be put in the TLB */