mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-07 17:53:56 -06:00
target/hppa: Implement prctl_unalign_sigbus
Leave TARGET_ALIGNED_ONLY set, but use the new CPUState flag to set MO_UNALN for the instructions that the kernel handles in the unaligned trap. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211227150127.2659293-6-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
parent
fed1424617
commit
217d1a5ef8
3 changed files with 20 additions and 6 deletions
|
@ -259,12 +259,14 @@ static inline target_ulong hppa_form_gva(CPUHPPAState *env, uint64_t spc,
|
|||
return hppa_form_gva_psw(env->psw, spc, off);
|
||||
}
|
||||
|
||||
/* Since PSW_{I,CB} will never need to be in tb->flags, reuse them.
|
||||
/*
|
||||
* Since PSW_{I,CB} will never need to be in tb->flags, reuse them.
|
||||
* TB_FLAG_SR_SAME indicates that SR4 through SR7 all contain the
|
||||
* same value.
|
||||
*/
|
||||
#define TB_FLAG_SR_SAME PSW_I
|
||||
#define TB_FLAG_PRIV_SHIFT 8
|
||||
#define TB_FLAG_UNALIGN 0x400
|
||||
|
||||
static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, target_ulong *pc,
|
||||
target_ulong *cs_base,
|
||||
|
@ -279,6 +281,7 @@ static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, target_ulong *pc,
|
|||
#ifdef CONFIG_USER_ONLY
|
||||
*pc = env->iaoq_f & -4;
|
||||
*cs_base = env->iaoq_b & -4;
|
||||
flags |= TB_FLAG_UNALIGN * !env_cpu(env)->prctl_unalign_sigbus;
|
||||
#else
|
||||
/* ??? E, T, H, L, B, P bits need to be here, when implemented. */
|
||||
flags |= env->psw & (PSW_W | PSW_C | PSW_D);
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue