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Add MSR VSX and Associated Exception

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This patch adds support for the VSX bit of the PowerPC Machine
State Register (MSR) as well as the corresponding VSX Unavailable
exception.

The VSX bit is added to the defined bits masks of the Power7 and
Power8 CPU models.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2013-10-22 22:06:17 +11:00 • committed by Alexander Graf
parent 74f2399755
commit 1f29871cb7
4 changed files with 18 additions and 2 deletions
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6
target-ppc/translate.c
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@ -195,6 +195,7 @@ typedef struct DisasContext {
#endif
int fpu_enabled;
int altivec_enabled;
int vsx_enabled;
int spe_enabled;
ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
int singlestep_enabled;
@ -9759,6 +9760,11 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
ctx.altivec_enabled = msr_vr;
else
ctx.altivec_enabled = 0;
if ((env->flags & POWERPC_FLAG_VSX) && msr_vsx) {
ctx.vsx_enabled = msr_vsx;
} else {
ctx.vsx_enabled = 0;
}
if ((env->flags & POWERPC_FLAG_SE) && msr_se)
ctx.singlestep_enabled = CPU_SINGLE_STEP;
else