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https://github.com/Motorhead1991/qemu.git
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* serial port fixes (Paolo)
* Q35 modeling improvements (Paolo, Vasily) * chardev cleanup improvements (Marc-André) * iscsi bugfix (Peter L.) * cpu_exec patch from multi-arch patches (Peter C.) * pci-assign tweak (Lin Ma) -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJXc+GeAAoJEL/70l94x66DtIAH/3+eUBqSxVJ3SMUxJep2Op07 lIWqw1GHAdw1gWQDG4HzokKWrVVp/+NFYQjRFcNMfF8L+/Xm6hHAYc7Y4DMkDxSw zHX2BT93gPcaFJRz3Md8n2anzFHaWePx7LucPjaoas2OzrbVKXC8JT6n3GGnKQzZ 0CxDoyW4keI4ZVAOy9SOKsLPxdSvG8uLvaZU98l/YS/TuiGzpv8IWcdHR+k1hua+ FIenzj7jD9+JFoLEUWkU0pYs33J6yYKPiZn7HgGL9RNWKPFR88+CtMdYXgfOPo7z i05L9RTmL4SpahmStPN2r72MC0T0ub0czk/+qxBNms4r/2gBwaSyldmcTfAXM9o= =DA8v -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging * serial port fixes (Paolo) * Q35 modeling improvements (Paolo, Vasily) * chardev cleanup improvements (Marc-André) * iscsi bugfix (Peter L.) * cpu_exec patch from multi-arch patches (Peter C.) * pci-assign tweak (Lin Ma) # gpg: Signature made Wed 29 Jun 2016 15:56:30 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (35 commits) socket: unlink unix socket on remove socket: add listen feature char: clean up remaining chardevs when leaving vhost-user: disable chardev handlers on close vhost-user-test: fix g_cond_wait_until compat implementation vl: smp_parse: fix regression ich9: implement SCI_IRQ_SEL register ich9: implement ACPI_EN register serial: reinstate watch after migration serial: remove watch on reset char: change qemu_chr_fe_add_watch to return unsigned serial: separate serial_xmit and serial_watch_cb serial: simplify tsr_retry reset serial: make tsr_retry unsigned iscsi: fix assertion in is_sector_request_lun_aligned target-*: Don't redefine cpu_exec() pci-assign: Move "Invalid ROM" error message to pci-assign-load-rom.c vnc: generalize "VNC server running on ..." message scsi: esp: fix migration MC146818 RTC: add GPIO access to output IRQ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
1ec20c2a3a
63 changed files with 350 additions and 214 deletions
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@ -295,9 +295,12 @@ static gboolean cadence_uart_xmit(GIOChannel *chan, GIOCondition cond,
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}
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if (s->tx_count) {
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int r = qemu_chr_fe_add_watch(s->chr, G_IO_OUT|G_IO_HUP,
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cadence_uart_xmit, s);
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assert(r);
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guint r = qemu_chr_fe_add_watch(s->chr, G_IO_OUT|G_IO_HUP,
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cadence_uart_xmit, s);
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if (!r) {
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s->tx_count = 0;
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return FALSE;
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}
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}
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uart_update_status(s);
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@ -106,6 +106,7 @@ do {} while (0)
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#endif
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static void serial_receive1(void *opaque, const uint8_t *buf, int size);
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static void serial_xmit(SerialState *s);
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static inline void recv_fifo_put(SerialState *s, uint8_t chr)
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{
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@ -223,13 +224,20 @@ static void serial_update_msl(SerialState *s)
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}
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}
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static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
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static gboolean serial_watch_cb(GIOChannel *chan, GIOCondition cond,
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void *opaque)
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{
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SerialState *s = opaque;
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s->watch_tag = 0;
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serial_xmit(s);
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return FALSE;
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}
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static void serial_xmit(SerialState *s)
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{
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do {
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assert(!(s->lsr & UART_LSR_TEMT));
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if (s->tsr_retry <= 0) {
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if (s->tsr_retry == 0) {
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assert(!(s->lsr & UART_LSR_THRE));
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if (s->fcr & UART_FCR_FE) {
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@ -251,17 +259,17 @@ static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
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if (s->mcr & UART_MCR_LOOP) {
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/* in loopback mode, say that we just received a char */
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serial_receive1(s, &s->tsr, 1);
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} else if (qemu_chr_fe_write(s->chr, &s->tsr, 1) != 1) {
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if (s->tsr_retry >= 0 && s->tsr_retry < MAX_XMIT_RETRY &&
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qemu_chr_fe_add_watch(s->chr, G_IO_OUT|G_IO_HUP,
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serial_xmit, s) > 0) {
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} else if (qemu_chr_fe_write(s->chr, &s->tsr, 1) != 1 &&
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s->tsr_retry < MAX_XMIT_RETRY) {
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assert(s->watch_tag == 0);
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s->watch_tag = qemu_chr_fe_add_watch(s->chr, G_IO_OUT|G_IO_HUP,
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serial_watch_cb, s);
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if (s->watch_tag > 0) {
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s->tsr_retry++;
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return FALSE;
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return;
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}
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s->tsr_retry = 0;
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} else {
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s->tsr_retry = 0;
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}
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s->tsr_retry = 0;
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/* Transmit another byte if it is already available. It is only
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possible when FIFO is enabled and not empty. */
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@ -269,11 +277,8 @@ static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
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s->last_xmit_ts = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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s->lsr |= UART_LSR_TEMT;
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return FALSE;
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}
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/* Setter for FCR.
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is_load flag means, that value is set while loading VM state
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and interrupt should not be invoked */
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@ -330,8 +335,8 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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s->lsr &= ~UART_LSR_THRE;
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s->lsr &= ~UART_LSR_TEMT;
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serial_update_irq(s);
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if (s->tsr_retry <= 0) {
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serial_xmit(NULL, G_IO_OUT, s);
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if (s->tsr_retry == 0) {
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serial_xmit(s);
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}
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}
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break;
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@ -639,6 +644,31 @@ static int serial_post_load(void *opaque, int version_id)
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if (s->thr_ipending == -1) {
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s->thr_ipending = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
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}
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if (s->tsr_retry > 0) {
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/* tsr_retry > 0 implies LSR.TEMT = 0 (transmitter not empty). */
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if (s->lsr & UART_LSR_TEMT) {
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error_report("inconsistent state in serial device "
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"(tsr empty, tsr_retry=%d", s->tsr_retry);
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return -1;
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}
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if (s->tsr_retry > MAX_XMIT_RETRY) {
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s->tsr_retry = MAX_XMIT_RETRY;
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}
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assert(s->watch_tag == 0);
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s->watch_tag = qemu_chr_fe_add_watch(s->chr, G_IO_OUT|G_IO_HUP,
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serial_watch_cb, s);
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} else {
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/* tsr_retry == 0 implies LSR.TEMT = 1 (transmitter empty). */
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if (!(s->lsr & UART_LSR_TEMT)) {
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error_report("inconsistent state in serial device "
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"(tsr not empty, tsr_retry=0");
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return -1;
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}
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}
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s->last_break_enable = (s->lcr >> 6) & 1;
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/* Initialize fcr via setter to perform essential side-effects */
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serial_write_fcr(s, s->fcr_vmstate);
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@ -685,7 +715,7 @@ static const VMStateDescription vmstate_serial_tsr = {
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.minimum_version_id = 1,
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.needed = serial_tsr_needed,
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.fields = (VMStateField[]) {
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VMSTATE_INT32(tsr_retry, SerialState),
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VMSTATE_UINT32(tsr_retry, SerialState),
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VMSTATE_UINT8(thr, SerialState),
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VMSTATE_UINT8(tsr, SerialState),
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VMSTATE_END_OF_LIST()
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@ -815,6 +845,11 @@ static void serial_reset(void *opaque)
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{
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SerialState *s = opaque;
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if (s->watch_tag > 0) {
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g_source_remove(s->watch_tag);
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s->watch_tag = 0;
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}
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s->rbr = 0;
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s->ier = 0;
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s->iir = UART_IIR_NO_INT;
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