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target-xtensa: implement SIMCALL

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Tensilica iss provides support for applications running in freestanding
environment through SIMCALL command. It is used by Tensilica libc to
access argc/argv, for file I/O, etc.

Note that simcalls that accept buffer addresses expect virtual addresses.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Max Filippov 2011-09-06 03:55:47 +04:00 • committed by Blue Swirl
parent 5b4e481b04
commit 1ddeaa5d42
5 changed files with 236 additions and 3 deletions
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4
qemu-options.hx
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@ -2396,11 +2396,11 @@ STEXI
Set OpenBIOS nvram @var{variable} to given @var{value} (PPC, SPARC only).
ETEXI
DEF("semihosting", 0, QEMU_OPTION_semihosting,
"-semihosting semihosting mode\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K)
"-semihosting semihosting mode\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA)
STEXI
@item -semihosting
@findex -semihosting
Semihosting mode (ARM, M68K only).
Semihosting mode (ARM, M68K, Xtensa only).
ETEXI
DEF("old-param", 0, QEMU_OPTION_old_param,
"-old-param old param mode\n", QEMU_ARCH_ARM)