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target-mips: Also apply the CP0.Status mask to MTTC0

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Make CP0.Status writes made with the MTTC0 instruction respect this
register's mask just like all the other places.  Also preserve the
current values of masked out bits.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
This commit is contained in:
Maciej W. Rozycki 2014-11-20 11:15:34 +00:00 • committed by Leon Alrae
parent cbb26c9a12
commit 1d725ae952
1 changed files with 2 additions and 1 deletions
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3
target-mips/op_helper.c
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@ -1413,9 +1413,10 @@ void helper_mtc0_status(CPUMIPSState *env, target_ulong arg1)
void helper_mttc0_status(CPUMIPSState *env, target_ulong arg1)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
uint32_t mask = env->CP0_Status_rw_bitmask & ~0xf1000018;
CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc);
other->CP0_Status = arg1 & ~0xf1000018;
other->CP0_Status = (other->CP0_Status & ~mask) | (arg1 & mask);
sync_c0_status(env, other, other_tc);
}