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target/riscv: Remove the HS_TWO_STAGE flag

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The HS_TWO_STAGE flag is no longer required as the MMU index contains
the information if we are performing a two stage access.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: f514b128b1ff0fb41c85f914cee18f905007a922.1604464950.git.alistair.francis@wdc.com
This commit is contained in:
Alistair Francis 2020-11-03 20:43:29 -08:00
parent 3e5979046f
commit 1c1c060aa8
4 changed files with 25 additions and 51 deletions
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1
target/riscv/cpu_bits.h
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@ -469,7 +469,6 @@
* page table fault.
*/
#define FORCE_HS_EXCEP 2
#define HS_TWO_STAGE 4
/* RV32 satp CSR field masks */
#define SATP32_MODE 0x80000000