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docs/specs: add riscv-iommu-sys information
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241106133407.604587-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -6,9 +6,9 @@ RISC-V IOMMU support for RISC-V machines
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QEMU implements a RISC-V IOMMU emulation based on the RISC-V IOMMU spec
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version 1.0 `iommu1.0`_.
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The emulation includes a PCI reference device, riscv-iommu-pci, that QEMU
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RISC-V boards can use. The 'virt' RISC-V machine is compatible with this
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device.
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The emulation includes a PCI reference device (riscv-iommu-pci) and a platform
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bus device (riscv-iommu-sys) that QEMU RISC-V boards can use. The 'virt'
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RISC-V machine is compatible with both devices.
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riscv-iommu-pci reference device
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--------------------------------
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@ -83,6 +83,30 @@ Several options are available to control the capabilities of the device, namely:
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- "s-stage": enable s-stage support
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- "g-stage": enable g-stage support
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riscv-iommu-sys device
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----------------------
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This device implements the RISC-V IOMMU emulation as a platform bus device that
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RISC-V boards can use.
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For the 'virt' board the device is disabled by default. To enable it use the
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'iommu-sys' machine option:
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.. code-block:: bash
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$ qemu-system-riscv64 -M virt,iommu-sys=on (...)
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There is no options to configure the capabilities of this device in the 'virt'
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board using the QEMU command line. The device is configured with the following
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riscv-iommu options:
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- "ioatc-limit": default value (2Mb)
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- "intremap": enabled
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- "ats": enabled
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- "off": on (DMA disabled)
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- "s-stage": enabled
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- "g-stage": enabled
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.. _iommu1.0: https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0/riscv-iommu.pdf
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.. _linux-v8: https://lore.kernel.org/linux-riscv/cover.1718388908.git.tjeznach@rivosinc.com/
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