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target/loongarch/gdbstub: Add vector registers support

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GDB already support LoongArch vector extension[1], QEMU gdb adds
LoongArch vector registers support, so that users can use 'info all-registers'
to get all vector registers values.

[1]: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=1e9569f383a3d5a88ee07d0c2401bd95613c222e

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewd-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240711024454.3075183-1-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2024-07-11 10:44:54 +08:00
parent 23fa74974d
commit 1c15dd632b
5 changed files with 192 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

60
gdb-xml/loongarch-lasx.xml Normal file
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@ -0,0 +1,60 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2022-2024 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.lasx">
<vector id="v8f32" type="ieee_single" count="8"/>
<vector id="v4f64" type="ieee_double" count="4"/>
<vector id="v32i8" type="int8" count="32"/>
<vector id="v16i16" type="int16" count="16"/>
<vector id="v8i32" type="int32" count="8"/>
<vector id="v4i64" type="int64" count="4"/>
<vector id="v2ui128" type="uint128" count="2"/>
<union id="lasxv">
<field name="v8_float" type="v8f32"/>
<field name="v4_double" type="v4f64"/>
<field name="v32_int8" type="v32i8"/>
<field name="v16_int16" type="v16i16"/>
<field name="v8_int32" type="v8i32"/>
<field name="v4_int64" type="v4i64"/>
<field name="v2_uint128" type="v2ui128"/>
</union>
<reg name="xr0" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr1" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr2" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr3" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr4" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr5" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr6" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr7" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr8" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr9" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr10" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr11" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr12" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr13" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr14" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr15" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr16" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr17" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr18" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr19" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr20" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr21" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr22" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr23" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr24" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr25" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr26" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr27" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr28" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr29" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr30" bitsize="256" type="lasxv" group="lasx"/>
<reg name="xr31" bitsize="256" type="lasxv" group="lasx"/>
</feature>

59
gdb-xml/loongarch-lsx.xml Normal file
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@ -0,0 +1,59 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2022-2024 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.lsx">
<vector id="v4f32" type="ieee_single" count="4"/>
<vector id="v2f64" type="ieee_double" count="2"/>
<vector id="v16i8" type="int8" count="16"/>
<vector id="v8i16" type="int16" count="8"/>
<vector id="v4i32" type="int32" count="4"/>
<vector id="v2i64" type="int64" count="2"/>
<union id="lsxv">
<field name="v4_float" type="v4f32"/>
<field name="v2_double" type="v2f64"/>
<field name="v16_int8" type="v16i8"/>
<field name="v8_int16" type="v8i16"/>
<field name="v4_int32" type="v4i32"/>
<field name="v2_int64" type="v2i64"/>
<field name="uint128" type="uint128"/>
</union>
<reg name="vr0" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr1" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr2" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr3" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr4" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr5" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr6" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr7" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr8" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr9" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr10" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr11" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr12" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr13" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr14" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr15" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr16" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr17" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr18" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr19" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr20" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr21" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr22" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr23" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr26" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr25" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr26" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr27" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr28" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr29" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr30" bitsize="128" type="lsxv" group="lsx"/>
<reg name="vr31" bitsize="128" type="lsxv" group="lsx"/>
</feature>