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hw/char/imx_serial: Turn some DPRINTF() statements into trace events

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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20250111183711.2338-9-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Bernhard Beschow 2025-01-11 19:37:06 +01:00 • committed by Philippe Mathieu-Daudé
parent 2eabc49809
commit 1bada3c94c
2 changed files with 44 additions and 19 deletions
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58
hw/char/imx_serial.c
View file

@ -27,6 +27,7 @@
#include "qemu/log.h" #include "qemu/log.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "qemu/fifo32.h" #include "qemu/fifo32.h"
#include "trace.h"
#ifndef DEBUG_IMX_UART #ifndef DEBUG_IMX_UART
#define DEBUG_IMX_UART 0 #define DEBUG_IMX_UART 0
@ -184,10 +185,10 @@ static uint64_t imx_serial_read(void *opaque, hwaddr offset,
unsigned size) unsigned size)
{ {
IMXSerialState *s = (IMXSerialState *)opaque; IMXSerialState *s = (IMXSerialState *)opaque;
Chardev *chr = qemu_chr_fe_get_driver(&s->chr);
uint32_t c, rx_used; uint32_t c, rx_used;
uint8_t rxtl = s->ufcr & TL_MASK; uint8_t rxtl = s->ufcr & TL_MASK;
uint64_t value;
DPRINTF("read(offset=0x%" HWADDR_PRIx ")\n", offset);
switch (offset >> 2) { switch (offset >> 2) {
case 0x0: /* URXD */ case 0x0: /* URXD */
@ -208,49 +209,67 @@ static uint64_t imx_serial_read(void *opaque, hwaddr offset,
imx_serial_rx_fifo_ageing_timer_restart(s); imx_serial_rx_fifo_ageing_timer_restart(s);
qemu_chr_fe_accept_input(&s->chr); qemu_chr_fe_accept_input(&s->chr);
} }
return c; value = c;
break;
case 0x20: /* UCR1 */ case 0x20: /* UCR1 */
return s->ucr1; value = s->ucr1;
break;
case 0x21: /* UCR2 */ case 0x21: /* UCR2 */
return s->ucr2; value = s->ucr2;
break;
case 0x25: /* USR1 */ case 0x25: /* USR1 */
return s->usr1; value = s->usr1;
break;
case 0x26: /* USR2 */ case 0x26: /* USR2 */
return s->usr2; value = s->usr2;
break;
case 0x2A: /* BRM Modulator */ case 0x2A: /* BRM Modulator */
return s->ubmr; value = s->ubmr;
break;
case 0x2B: /* Baud Rate Count */ case 0x2B: /* Baud Rate Count */
return s->ubrc; value = s->ubrc;
break;
case 0x2d: /* Test register */ case 0x2d: /* Test register */
return s->uts1; value = s->uts1;
break;
case 0x24: /* UFCR */ case 0x24: /* UFCR */
return s->ufcr; value = s->ufcr;
break;
case 0x2c: case 0x2c:
return s->onems; value = s->onems;
break;
case 0x22: /* UCR3 */ case 0x22: /* UCR3 */
return s->ucr3; value = s->ucr3;
break;
case 0x23: /* UCR4 */ case 0x23: /* UCR4 */
return s->ucr4; value = s->ucr4;
break;
case 0x29: /* BRM Incremental */ case 0x29: /* BRM Incremental */
return 0x0; /* TODO */ value = 0x0; /* TODO */
break;
default: default:
qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%" qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
HWADDR_PRIx "\n", TYPE_IMX_SERIAL, __func__, offset); HWADDR_PRIx "\n", TYPE_IMX_SERIAL, __func__, offset);
return 0; value = 0;
break;
} }
trace_imx_serial_read(chr ? chr->label : "NODEV", offset, value);
return value;
} }
static void imx_serial_write(void *opaque, hwaddr offset, static void imx_serial_write(void *opaque, hwaddr offset,
@ -260,8 +279,7 @@ static void imx_serial_write(void *opaque, hwaddr offset,
Chardev *chr = qemu_chr_fe_get_driver(&s->chr); Chardev *chr = qemu_chr_fe_get_driver(&s->chr);
unsigned char ch; unsigned char ch;
DPRINTF("write(offset=0x%" HWADDR_PRIx ", value = 0x%x) to %s\n", trace_imx_serial_write(chr ? chr->label : "NODEV", offset, value);
offset, (unsigned int)value, chr ? chr->label : "NODEV");
switch (offset >> 2) { switch (offset >> 2) {
case 0x10: /* UTXD */ case 0x10: /* UTXD */
@ -373,9 +391,11 @@ static int imx_can_receive(void *opaque)
static void imx_put_data(void *opaque, uint32_t value) static void imx_put_data(void *opaque, uint32_t value)
{ {
IMXSerialState *s = (IMXSerialState *)opaque; IMXSerialState *s = (IMXSerialState *)opaque;
Chardev *chr = qemu_chr_fe_get_driver(&s->chr);
uint8_t rxtl = s->ufcr & TL_MASK; uint8_t rxtl = s->ufcr & TL_MASK;
DPRINTF("received char\n"); trace_imx_serial_put_data(chr ? chr->label : "NODEV", value);
imx_serial_rx_fifo_push(s, value); imx_serial_rx_fifo_push(s, value);
if (fifo32_num_used(&s->rx_fifo) >= rxtl) { if (fifo32_num_used(&s->rx_fifo) >= rxtl) {
s->usr1 |= USR1_RRDY; s->usr1 |= USR1_RRDY;

5
hw/char/trace-events
View file

@ -52,6 +52,11 @@ escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x"
escc_kbd_command(int val) "Command %d" escc_kbd_command(int val) "Command %d"
escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=0x%01x" escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=0x%01x"
# imx_serial.c
imx_serial_read(const char *chrname, uint64_t addr, uint64_t value) "%s:[0x%03" PRIu64 "] -> 0x%08" PRIx64
imx_serial_write(const char *chrname, uint64_t addr, uint64_t value) "%s:[0x%03" PRIu64 "] <- 0x%08" PRIx64
imx_serial_put_data(const char *chrname, uint32_t value) "%s: 0x%" PRIx32
# pl011.c # pl011.c
pl011_irq_state(int level) "irq state %d" pl011_irq_state(int level) "irq state %d"
pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s"