hw/ide/ahci: Extract TYPE_SYSBUS_AHCI into dedicated file

Implement in dedicated file, just like TYPE_ICH9_AHCI.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20241212110926.23548-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Bernhard Beschow 2024-12-05 14:19:37 +01:00 committed by Philippe Mathieu-Daudé
parent 8a4989f526
commit 1b26146e89
5 changed files with 101 additions and 72 deletions

View file

@ -71,7 +71,7 @@ config HIGHBANK
depends on TCG && ARM depends on TCG && ARM
select A9MPCORE select A9MPCORE
select A15MPCORE select A15MPCORE
select AHCI select AHCI_SYSBUS
select ARM_TIMER # sp804 select ARM_TIMER # sp804
select ARM_V7M select ARM_V7M
select PL011 if !HAVE_RUST # UART select PL011 if !HAVE_RUST # UART
@ -192,7 +192,7 @@ config SBSA_REF
depends on TCG && AARCH64 depends on TCG && AARCH64
imply PCI_DEVICES imply PCI_DEVICES
select DEVICE_TREE select DEVICE_TREE
select AHCI select AHCI_SYSBUS
select ARM_SMMUV3 select ARM_SMMUV3
select GPIO_KEY select GPIO_KEY
select PCI_EXPRESS select PCI_EXPRESS
@ -319,7 +319,7 @@ config ARM_V7M
config ALLWINNER_A10 config ALLWINNER_A10
bool bool
select AHCI select AHCI_SYSBUS
select ALLWINNER_A10_PIT select ALLWINNER_A10_PIT
select ALLWINNER_A10_PIC select ALLWINNER_A10_PIC
select ALLWINNER_A10_CCM select ALLWINNER_A10_CCM
@ -352,7 +352,7 @@ config ALLWINNER_H3
config ALLWINNER_R40 config ALLWINNER_R40
bool bool
default y if TCG && ARM default y if TCG && ARM
select AHCI select AHCI_SYSBUS
select ALLWINNER_SRAMC select ALLWINNER_SRAMC
select ALLWINNER_A10_PIT select ALLWINNER_A10_PIT
select ALLWINNER_WDT select ALLWINNER_WDT
@ -422,7 +422,7 @@ config XLNX_ZYNQMP_ARM
bool bool
default y if PIXMAN default y if PIXMAN
depends on TCG && AARCH64 depends on TCG && AARCH64
select AHCI select AHCI_SYSBUS
select ARM_GIC select ARM_GIC
select CADENCE select CADENCE
select CPU_CLUSTER select CPU_CLUSTER

View file

@ -54,6 +54,10 @@ config AHCI_ICH9
depends on PCI depends on PCI
select AHCI select AHCI
config AHCI_SYSBUS
bool
select AHCI
config IDE_SII3112 config IDE_SII3112
bool bool
select IDE_PCI select IDE_PCI

91
hw/ide/ahci-sysbus.c Normal file
View file

@ -0,0 +1,91 @@
/*
* QEMU AHCI Emulation (MMIO-mapped devices)
*
* Copyright (c) 2010 qiaochong@loongson.cn
* Copyright (c) 2010 Roland Elek <elek.roland@gmail.com>
* Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
* Copyright (c) 2010 Alexander Graf <agraf@suse.de>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*
*/
#include "qemu/osdep.h"
#include "exec/address-spaces.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "hw/ide/ahci-sysbus.h"
#include "ahci-internal.h"
static const VMStateDescription vmstate_sysbus_ahci = {
.name = "sysbus-ahci",
.fields = (const VMStateField[]) {
VMSTATE_AHCI(ahci, SysbusAHCIState),
VMSTATE_END_OF_LIST()
},
};
static void sysbus_ahci_reset(DeviceState *dev)
{
SysbusAHCIState *s = SYSBUS_AHCI(dev);
ahci_reset(&s->ahci);
}
static void sysbus_ahci_init(Object *obj)
{
SysbusAHCIState *s = SYSBUS_AHCI(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
ahci_init(&s->ahci, DEVICE(obj));
sysbus_init_mmio(sbd, &s->ahci.mem);
sysbus_init_irq(sbd, &s->ahci.irq);
}
static void sysbus_ahci_realize(DeviceState *dev, Error **errp)
{
SysbusAHCIState *s = SYSBUS_AHCI(dev);
ahci_realize(&s->ahci, dev, &address_space_memory);
}
static Property sysbus_ahci_properties[] = {
DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1),
DEFINE_PROP_END_OF_LIST(),
};
static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = sysbus_ahci_realize;
dc->vmsd = &vmstate_sysbus_ahci;
device_class_set_props(dc, sysbus_ahci_properties);
device_class_set_legacy_reset(dc, sysbus_ahci_reset);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
static const TypeInfo sysbus_ahci_types[] = {
{
.name = TYPE_SYSBUS_AHCI,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(SysbusAHCIState),
.instance_init = sysbus_ahci_init,
.class_init = sysbus_ahci_class_init,
},
};
DEFINE_TYPES(sysbus_ahci_types)

View file

@ -23,16 +23,13 @@
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "hw/irq.h" #include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h" #include "migration/vmstate.h"
#include "qemu/error-report.h" #include "qemu/error-report.h"
#include "qemu/log.h" #include "qemu/log.h"
#include "qemu/main-loop.h" #include "qemu/main-loop.h"
#include "qemu/module.h"
#include "sysemu/block-backend.h" #include "sysemu/block-backend.h"
#include "sysemu/dma.h" #include "sysemu/dma.h"
#include "hw/ide/ahci-sysbus.h"
#include "ahci-internal.h" #include "ahci-internal.h"
#include "ide-internal.h" #include "ide-internal.h"
@ -1803,70 +1800,6 @@ const VMStateDescription vmstate_ahci = {
}, },
}; };
static const VMStateDescription vmstate_sysbus_ahci = {
.name = "sysbus-ahci",
.fields = (const VMStateField[]) {
VMSTATE_AHCI(ahci, SysbusAHCIState),
VMSTATE_END_OF_LIST()
},
};
static void sysbus_ahci_reset(DeviceState *dev)
{
SysbusAHCIState *s = SYSBUS_AHCI(dev);
ahci_reset(&s->ahci);
}
static void sysbus_ahci_init(Object *obj)
{
SysbusAHCIState *s = SYSBUS_AHCI(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
ahci_init(&s->ahci, DEVICE(obj));
sysbus_init_mmio(sbd, &s->ahci.mem);
sysbus_init_irq(sbd, &s->ahci.irq);
}
static void sysbus_ahci_realize(DeviceState *dev, Error **errp)
{
SysbusAHCIState *s = SYSBUS_AHCI(dev);
ahci_realize(&s->ahci, dev, &address_space_memory);
}
static Property sysbus_ahci_properties[] = {
DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1),
DEFINE_PROP_END_OF_LIST(),
};
static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = sysbus_ahci_realize;
dc->vmsd = &vmstate_sysbus_ahci;
device_class_set_props(dc, sysbus_ahci_properties);
device_class_set_legacy_reset(dc, sysbus_ahci_reset);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
static const TypeInfo sysbus_ahci_info = {
.name = TYPE_SYSBUS_AHCI,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(SysbusAHCIState),
.instance_init = sysbus_ahci_init,
.class_init = sysbus_ahci_class_init,
};
static void sysbus_ahci_register_types(void)
{
type_register_static(&sysbus_ahci_info);
}
type_init(sysbus_ahci_register_types)
void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd) void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd)
{ {
int i; int i;

View file

@ -1,5 +1,6 @@
system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c')) system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c'))
system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c')) system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c'))
system_ss.add(when: 'CONFIG_AHCI_SYSBUS', if_true: files('ahci-sysbus.c'))
system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c')) system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c'))
system_ss.add(when: 'CONFIG_IDE_BUS', if_true: files('ide-bus.c')) system_ss.add(when: 'CONFIG_IDE_BUS', if_true: files('ide-bus.c'))
system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c')) system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c'))