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target-ppc: convert 405 MAC instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5591 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32
parent
7463740644
commit
182608d44c
4 changed files with 72 additions and 140 deletions
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@ -5214,8 +5214,11 @@ static always_inline void gen_405_mulladd_insn (DisasContext *ctx,
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int opc2, int opc3,
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int ra, int rb, int rt, int Rc)
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{
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tcg_gen_mov_tl(cpu_T[0], cpu_gpr[ra]);
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tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rb]);
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TCGv t0, t1;
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t0 = tcg_temp_local_new(TCG_TYPE_TL);
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t1 = tcg_temp_local_new(TCG_TYPE_TL);
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switch (opc3 & 0x0D) {
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case 0x05:
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/* macchw - macchw. - macchwo - macchwo. */
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@ -5223,13 +5226,17 @@ static always_inline void gen_405_mulladd_insn (DisasContext *ctx,
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/* nmacchw - nmacchw. - nmacchwo - nmacchwo. */
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/* nmacchws - nmacchws. - nmacchwso - nmacchwso. */
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/* mulchw - mulchw. */
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gen_op_405_mulchw();
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tcg_gen_ext16s_tl(t0, cpu_gpr[ra]);
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tcg_gen_sari_tl(t1, cpu_gpr[rb], 16);
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tcg_gen_ext16s_tl(t1, t1);
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break;
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case 0x04:
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/* macchwu - macchwu. - macchwuo - macchwuo. */
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/* macchwsu - macchwsu. - macchwsuo - macchwsuo. */
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/* mulchwu - mulchwu. */
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gen_op_405_mulchwu();
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tcg_gen_ext16u_tl(t0, cpu_gpr[ra]);
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tcg_gen_shri_tl(t1, cpu_gpr[rb], 16);
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tcg_gen_ext16u_tl(t1, t1);
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break;
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case 0x01:
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/* machhw - machhw. - machhwo - machhwo. */
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@ -5237,13 +5244,19 @@ static always_inline void gen_405_mulladd_insn (DisasContext *ctx,
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/* nmachhw - nmachhw. - nmachhwo - nmachhwo. */
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/* nmachhws - nmachhws. - nmachhwso - nmachhwso. */
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/* mulhhw - mulhhw. */
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gen_op_405_mulhhw();
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tcg_gen_sari_tl(t0, cpu_gpr[ra], 16);
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tcg_gen_ext16s_tl(t0, t0);
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tcg_gen_sari_tl(t1, cpu_gpr[rb], 16);
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tcg_gen_ext16s_tl(t1, t1);
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break;
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case 0x00:
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/* machhwu - machhwu. - machhwuo - machhwuo. */
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/* machhwsu - machhwsu. - machhwsuo - machhwsuo. */
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/* mulhhwu - mulhhwu. */
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gen_op_405_mulhhwu();
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tcg_gen_shri_tl(t0, cpu_gpr[ra], 16);
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tcg_gen_ext16u_tl(t0, t0);
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tcg_gen_shri_tl(t1, cpu_gpr[rb], 16);
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tcg_gen_ext16u_tl(t1, t1);
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break;
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case 0x0D:
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/* maclhw - maclhw. - maclhwo - maclhwo. */
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@ -5251,43 +5264,70 @@ static always_inline void gen_405_mulladd_insn (DisasContext *ctx,
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/* nmaclhw - nmaclhw. - nmaclhwo - nmaclhwo. */
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/* nmaclhws - nmaclhws. - nmaclhwso - nmaclhwso. */
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/* mullhw - mullhw. */
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gen_op_405_mullhw();
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tcg_gen_ext16s_tl(t0, cpu_gpr[ra]);
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tcg_gen_ext16s_tl(t1, cpu_gpr[rb]);
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break;
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case 0x0C:
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/* maclhwu - maclhwu. - maclhwuo - maclhwuo. */
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/* maclhwsu - maclhwsu. - maclhwsuo - maclhwsuo. */
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/* mullhwu - mullhwu. */
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gen_op_405_mullhwu();
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tcg_gen_ext16u_tl(t0, cpu_gpr[ra]);
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tcg_gen_ext16u_tl(t1, cpu_gpr[rb]);
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break;
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}
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if (opc2 & 0x02) {
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/* nmultiply-and-accumulate (0x0E) */
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tcg_gen_neg_tl(cpu_T[0], cpu_T[0]);
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}
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if (opc2 & 0x04) {
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/* (n)multiply-and-accumulate (0x0C - 0x0E) */
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tcg_gen_mov_tl(cpu_T[2], cpu_gpr[rt]);
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tcg_gen_mov_tl(cpu_T[1], cpu_T[0]);
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gen_op_405_add_T0_T2();
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/* (n)multiply-and-accumulate (0x0C / 0x0E) */
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tcg_gen_mul_tl(t1, t0, t1);
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if (opc2 & 0x02) {
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/* nmultiply-and-accumulate (0x0E) */
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tcg_gen_sub_tl(t0, cpu_gpr[rt], t1);
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} else {
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/* multiply-and-accumulate (0x0C) */
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tcg_gen_add_tl(t0, cpu_gpr[rt], t1);
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}
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if (opc3 & 0x12) {
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/* Check overflow and/or saturate */
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int l1 = gen_new_label();
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if (opc3 & 0x10) {
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/* Start with XER OV disabled, the most likely case */
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tcg_gen_andi_tl(cpu_xer, cpu_xer, ~(1 << XER_OV));
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}
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if (opc3 & 0x01) {
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/* Signed */
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tcg_gen_xor_tl(t1, cpu_gpr[rt], t1);
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tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1);
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tcg_gen_xor_tl(t1, cpu_gpr[rt], t0);
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tcg_gen_brcondi_tl(TCG_COND_LT, t1, 0, l1);
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if (opc3 & 0x02) {
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/* Saturate */
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tcg_gen_sari_tl(t0, cpu_gpr[rt], 31);
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tcg_gen_xori_tl(t0, t0, 0x7fffffff);
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}
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} else {
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/* Unsigned */
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tcg_gen_brcond_tl(TCG_COND_GEU, t0, t1, l1);
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if (opc3 & 0x02) {
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/* Saturate */
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tcg_gen_movi_tl(t0, UINT32_MAX);
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}
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}
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if (opc3 & 0x10) {
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/* Check overflow */
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tcg_gen_ori_tl(cpu_xer, cpu_xer, (1 << XER_OV) | (1 << XER_SO));
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}
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gen_set_label(l1);
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tcg_gen_mov_tl(cpu_gpr[rt], t0);
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}
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} else {
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tcg_gen_mul_tl(cpu_gpr[rt], t0, t1);
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}
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if (opc3 & 0x10) {
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/* Check overflow */
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if (opc3 & 0x01)
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gen_op_check_addo();
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else
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gen_op_405_check_ovu();
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}
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if (opc3 & 0x02) {
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/* Saturate */
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if (opc3 & 0x01)
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gen_op_405_check_sat();
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else
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gen_op_405_check_satu();
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}
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tcg_gen_mov_tl(cpu_gpr[rt], cpu_T[0]);
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tcg_temp_free(t0);
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tcg_temp_free(t1);
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if (unlikely(Rc) != 0) {
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/* Update Rc0 */
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gen_set_Rc0(ctx, cpu_T[0]);
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gen_set_Rc0(ctx, cpu_gpr[rt]);
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}
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}
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