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ppc/pnv: remove root port name from pnv_phb_attach_root_port()

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We support only a single root port, PNV_PHB_ROOT_PORT.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220624084921.399219-10-danielhb413@gmail.com>
This commit is contained in:
Daniel Henrique Barboza 2022-06-24 05:49:18 -03:00
parent c8d14603e9
commit 17c681e92d
3 changed files with 7 additions and 12 deletions
Download patch file Download diff file Expand all files Collapse all files

7
hw/pci-host/pnv_phb.c
View file

@ -24,7 +24,6 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
PnvPHB *phb = PNV_PHB(dev); PnvPHB *phb = PNV_PHB(dev);
PCIHostState *pci = PCI_HOST_BRIDGE(dev); PCIHostState *pci = PCI_HOST_BRIDGE(dev);
g_autofree char *phb_typename = NULL; g_autofree char *phb_typename = NULL;
g_autofree char *phb_rootport_typename = NULL;
if (!phb->version) { if (!phb->version) {
error_setg(errp, "version not specified"); error_setg(errp, "version not specified");
@ -34,15 +33,12 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
switch (phb->version) { switch (phb->version) {
case 3: case 3:
phb_typename = g_strdup(TYPE_PNV_PHB3); phb_typename = g_strdup(TYPE_PNV_PHB3);
phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT);
break; break;
case 4: case 4:
phb_typename = g_strdup(TYPE_PNV_PHB4); phb_typename = g_strdup(TYPE_PNV_PHB4);
phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT);
break; break;
case 5: case 5:
phb_typename = g_strdup(TYPE_PNV_PHB5); phb_typename = g_strdup(TYPE_PNV_PHB5);
phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT);
break; break;
default: default:
g_assert_not_reached(); g_assert_not_reached();
@ -73,8 +69,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
pnv_phb4_bus_init(dev, PNV_PHB4(phb->backend)); pnv_phb4_bus_init(dev, PNV_PHB4(phb->backend));
} }
pnv_phb_attach_root_port(pci, phb_rootport_typename, pnv_phb_attach_root_port(pci, phb->phb_id, phb->chip_id);
phb->phb_id, phb->chip_id);
} }
static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge, static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge,

9
hw/ppc/pnv.c
View file

@ -1195,11 +1195,12 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
* QOM id. 'chip_id' is going to be used as PCIE chassis for the * QOM id. 'chip_id' is going to be used as PCIE chassis for the
* root port. * root port.
*/ */
void pnv_phb_attach_root_port(PCIHostState *pci, const char *name, void pnv_phb_attach_root_port(PCIHostState *pci, int index, int chip_id)
int index, int chip_id)
{ {
PCIDevice *root = pci_new(PCI_DEVFN(0, 0), name); PCIDevice *root = pci_new(PCI_DEVFN(0, 0), TYPE_PNV_PHB_ROOT_PORT);
g_autofree char *default_id = g_strdup_printf("%s[%d]", name, index); g_autofree char *default_id = g_strdup_printf("%s[%d]",
TYPE_PNV_PHB_ROOT_PORT,
index);
const char *dev_id = DEVICE(root)->id; const char *dev_id = DEVICE(root)->id;
object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id, object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id,

3
include/hw/ppc/pnv.h
View file

@ -193,8 +193,7 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
TYPE_PNV_CHIP_POWER10) TYPE_PNV_CHIP_POWER10)
PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
void pnv_phb_attach_root_port(PCIHostState *pci, const char *name, void pnv_phb_attach_root_port(PCIHostState *pci, int index, int chip_id);
int index, int chip_id);
#define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv") #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv")
typedef struct PnvMachineClass PnvMachineClass; typedef struct PnvMachineClass PnvMachineClass;