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tcg/aarch64: Fix output of extract2 opcodes

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This patch fixes two problems:
(1) The inputs to the EXTR insn were reversed,
(2) The input constraints use rZ, which means that we need to use
    the REG0 macro in order to supply XZR for a constant 0 input.

Fixes: 464c2969d5
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-07-09 18:36:34 +00:00
parent 80f4d7c3ae
commit 1789d4274b
1 changed files with 1 additions and 1 deletions
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2
tcg/aarch64/tcg-target.inc.c
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@ -2226,7 +2226,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_extract2_i64: case INDEX_op_extract2_i64:
case INDEX_op_extract2_i32: case INDEX_op_extract2_i32:
tcg_out_extr(s, ext, a0, a1, a2, args[3]); tcg_out_extr(s, ext, a0, REG0(2), REG0(1), args[3]);
break; break;
case INDEX_op_add2_i32: case INDEX_op_add2_i32: