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aspeed queue:

Browse source 
* Fix AST2700 SoC model
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Merge tag 'pull-aspeed-20250323' of https://github.com/legoater/qemu into staging

aspeed queue:

* Fix AST2700 SoC model

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# gpg: Signature made Sun 23 Mar 2025 13:44:13 EDT
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# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-aspeed-20250323' of https://github.com/legoater/qemu:
  hw/misc/aspeed_hace: Fix buffer overflow in has_padding function
  hw/intc/aspeed: Fix IRQ handler mask check
  aspeed: Fix maximum number of spi controller

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2025-03-24 13:26:23 -04:00
commit 170825d14d
3 changed files with 7 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

2
hw/intc/aspeed_intc.c
View file

@ -111,7 +111,7 @@ static void aspeed_intc_set_irq_handler(AspeedINTCState *s,
outpin_idx = intc_irq->outpin_idx;
inpin_idx = intc_irq->inpin_idx;
if (s->mask[inpin_idx] || s->regs[status_reg]) {
if ((s->mask[inpin_idx] & select) || (s->regs[status_reg] & select)) {
/*
* a. mask is not 0 means in ISR mode
* sources interrupt routine are executing.

5
hw/misc/aspeed_hace.c
View file

@ -128,6 +128,11 @@ static bool has_padding(AspeedHACEState *s, struct iovec *iov,
if (*total_msg_len <= s->total_req_len) {
uint32_t padding_size = s->total_req_len - *total_msg_len;
uint8_t *padding = iov->iov_base;
if (padding_size > req_len) {
return false;
}
*pad_offset = req_len - padding_size;
if (padding[*pad_offset] == 0x80) {
return true;

2
include/hw/arm/aspeed_soc.h
View file

@ -42,7 +42,7 @@
#include "hw/char/serial-mm.h"
#include "hw/intc/arm_gicv3.h"
#define ASPEED_SPIS_NUM 2
#define ASPEED_SPIS_NUM 3
#define ASPEED_EHCIS_NUM 2
#define ASPEED_WDTS_NUM 8
#define ASPEED_CPUS_NUM 4