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Add HPET emulation to qemu (Beth Kon)
This patch adds HPET emulation. It can be disabled with -disable-hpet. An hpet provides a more finely granular clocksource than otherwise available on PC. This means that latency-dependent applications (e.g. multimedia) will generally be smoother when using the HPET. Signed-off-by: Beth Kon <eak@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6081 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aliguori
parent
0bacd1300d
commit
16b29ae180
13 changed files with 938 additions and 6 deletions
190
pc-bios/bios-pq/0005_hpet.patch
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190
pc-bios/bios-pq/0005_hpet.patch
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@ -0,0 +1,190 @@
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BOCHS BIOS changes to support HPET in QEMU.
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Signed-off-by Beth Kon <eak@us.ibm.com>
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Index: bochs-2.3.7/bios/acpi-dsdt.dsl
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===================================================================
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--- bochs-2.3.7.orig/bios/acpi-dsdt.dsl 2008-10-15 12:39:14.000000000 -0500
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+++ bochs-2.3.7/bios/acpi-dsdt.dsl 2008-10-28 07:58:40.000000000 -0500
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@@ -159,6 +159,26 @@
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Return (MEMP)
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}
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}
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+#ifdef BX_QEMU
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+ Device(HPET) {
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+ Name(_HID, EISAID("PNP0103"))
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+ Name(_UID, 0)
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+ Method (_STA, 0, NotSerialized) {
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+ Return(0x0F)
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+ }
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+ Name(_CRS, ResourceTemplate() {
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+ DWordMemory(
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+ ResourceConsumer, PosDecode, MinFixed, MaxFixed,
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+ NonCacheable, ReadWrite,
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+ 0x00000000,
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+ 0xFED00000,
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+ 0xFED003FF,
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+ 0x00000000,
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+ 0x00000400 /* 1K memory: FED00000 - FED003FF */
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+ )
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+ })
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+ }
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+#endif
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}
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Scope(\_SB.PCI0) {
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Index: bochs-2.3.7/bios/rombios32.c
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===================================================================
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--- bochs-2.3.7.orig/bios/rombios32.c 2008-10-15 12:39:36.000000000 -0500
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+++ bochs-2.3.7/bios/rombios32.c 2008-11-12 14:41:41.000000000 -0600
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@@ -1087,7 +1087,11 @@
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struct rsdt_descriptor_rev1
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{
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ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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+#ifdef BX_QEMU
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+ uint32_t table_offset_entry [4]; /* Array of pointers to other */
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+#else
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uint32_t table_offset_entry [3]; /* Array of pointers to other */
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+#endif
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/* ACPI tables */
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};
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@@ -1227,6 +1231,32 @@
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#endif
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};
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+#ifdef BX_QEMU
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+/*
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+ * * ACPI 2.0 Generic Address Space definition.
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+ * */
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+struct acpi_20_generic_address {
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+ uint8_t address_space_id;
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+ uint8_t register_bit_width;
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+ uint8_t register_bit_offset;
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+ uint8_t reserved;
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+ uint64_t address;
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+};
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+
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+/*
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+ * * HPET Description Table
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+ * */
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+struct acpi_20_hpet {
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+ ACPI_TABLE_HEADER_DEF /* ACPI common table header */
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+ uint32_t timer_block_id;
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+ struct acpi_20_generic_address addr;
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+ uint8_t hpet_number;
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+ uint16_t min_tick;
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+ uint8_t page_protect;
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+};
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+#define ACPI_HPET_ADDRESS 0xFED00000UL
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+#endif
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+
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struct madt_io_apic
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{
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APIC_HEADER_DEF
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@@ -1237,6 +1267,17 @@
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* lines start */
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};
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+#ifdef BX_QEMU
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+struct madt_int_override
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+{
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+ APIC_HEADER_DEF
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+ uint8_t bus; /* Identifies ISA Bus */
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+ uint8_t source; /* Bus-relative interrupt source */
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+ uint32_t gsi; /* GSI that source will signal */
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+ uint16_t flags; /* MPS INTI flags */
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+};
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+#endif
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+
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#include "acpi-dsdt.hex"
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static inline uint16_t cpu_to_le16(uint16_t x)
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@@ -1342,6 +1383,10 @@
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struct facs_descriptor_rev1 *facs;
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struct multiple_apic_table *madt;
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uint8_t *dsdt, *ssdt;
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+#ifdef BX_QEMU
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+ struct acpi_20_hpet *hpet;
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+ uint32_t hpet_addr;
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+#endif
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uint32_t base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr, ssdt_addr;
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uint32_t acpi_tables_size, madt_addr, madt_size;
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int i;
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@@ -1384,10 +1429,21 @@
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madt_addr = addr;
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madt_size = sizeof(*madt) +
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sizeof(struct madt_processor_apic) * smp_cpus +
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+#ifdef BX_QEMU
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+ sizeof(struct madt_io_apic) + sizeof(struct madt_int_override);
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+#else
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sizeof(struct madt_io_apic);
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+#endif
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madt = (void *)(addr);
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addr += madt_size;
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+#ifdef BX_QEMU
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+ addr = (addr + 7) & ~7;
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+ hpet_addr = addr;
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+ hpet = (void *)(addr);
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+ addr += sizeof(*hpet);
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+#endif
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+
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acpi_tables_size = addr - base_addr;
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BX_INFO("ACPI tables: RSDP addr=0x%08lx ACPI DATA addr=0x%08lx size=0x%x\n",
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@@ -1410,6 +1466,9 @@
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rsdt->table_offset_entry[0] = cpu_to_le32(fadt_addr);
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rsdt->table_offset_entry[1] = cpu_to_le32(madt_addr);
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rsdt->table_offset_entry[2] = cpu_to_le32(ssdt_addr);
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+#ifdef BX_QEMU
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+ rsdt->table_offset_entry[3] = cpu_to_le32(hpet_addr);
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+#endif
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acpi_build_table_header((struct acpi_table_header *)rsdt,
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"RSDT", sizeof(*rsdt), 1);
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@@ -1448,6 +1507,9 @@
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{
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struct madt_processor_apic *apic;
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struct madt_io_apic *io_apic;
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+#ifdef BX_QEMU
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+ struct madt_int_override *int_override;
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+#endif
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memset(madt, 0, madt_size);
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madt->local_apic_address = cpu_to_le32(0xfee00000);
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@@ -1467,10 +1529,34 @@
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io_apic->io_apic_id = smp_cpus;
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io_apic->address = cpu_to_le32(0xfec00000);
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io_apic->interrupt = cpu_to_le32(0);
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+#ifdef BX_QEMU
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+ io_apic++;
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+
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+ int_override = (void *)io_apic;
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+ int_override->type = APIC_XRUPT_OVERRIDE;
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+ int_override->length = sizeof(*int_override);
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+ int_override->bus = cpu_to_le32(0);
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+ int_override->source = cpu_to_le32(0);
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+ int_override->gsi = cpu_to_le32(2);
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+ int_override->flags = cpu_to_le32(0);
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+#endif
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acpi_build_table_header((struct acpi_table_header *)madt,
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"APIC", madt_size, 1);
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}
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+
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+#ifdef BX_QEMU
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+ /* HPET */
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+ memset(hpet, 0, sizeof(*hpet));
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+ /* Note timer_block_id value must be kept in sync with value advertised by
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+ * emulated hpet
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+ */
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+ hpet->timer_block_id = cpu_to_le32(0x8086a201);
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+ hpet->addr.address = cpu_to_le32(ACPI_HPET_ADDRESS);
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+ acpi_build_table_header((struct acpi_table_header *)hpet,
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+ "HPET", sizeof(*hpet), 1);
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+#endif
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+
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}
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/* SMBIOS entry point -- must be written to a 16-bit aligned address
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@ -2,3 +2,4 @@
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0002_e820-high-mem.patch
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0003_smp-startup-poll.patch
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0004_no-stack-protector.patch
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0005_hpet.patch
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BIN
pc-bios/bios.bin
BIN
pc-bios/bios.bin
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