motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-09 10:34:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

hw/sd/omap_mmc: Untabify

Browse source 
This is a very old source file, and still has some lingering
hard-coded tabs; untabify it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250128104519.3981448-9-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Peter Maydell 2025-01-28 10:45:16 +00:00 • committed by Philippe Mathieu-Daudé
parent d44515d186
commit 1671542fce
1 changed files with 62 additions and 62 deletions
Download patch file Download diff file Expand all files Collapse all files

124
hw/sd/omap_mmc.c
View file

@ -109,11 +109,11 @@ static void omap_mmc_fifolevel_update(OMAPMMCState *host)
/* These must match the encoding of the MMC_CMD Response field */ /* These must match the encoding of the MMC_CMD Response field */
typedef enum { typedef enum {
sd_nore = 0, /* no response */ sd_nore = 0, /* no response */
sd_r1, /* normal response command */ sd_r1, /* normal response command */
sd_r2, /* CID, CSD registers */ sd_r2, /* CID, CSD registers */
sd_r3, /* OCR register */ sd_r3, /* OCR register */
sd_r6 = 6, /* Published RCA response */ sd_r6 = 6, /* Published RCA response */
sd_r1b = -1, sd_r1b = -1,
} sd_rsp_type_t; } sd_rsp_type_t;
@ -229,7 +229,7 @@ static void omap_mmc_command(OMAPMMCState *host, int cmd, int dir,
if (timeout) if (timeout)
host->status |= 0x0080; host->status |= 0x0080;
else if (cmd == 12) else if (cmd == 12)
host->status |= 0x0005; /* Makes it more real */ host->status |= 0x0005; /* Makes it more real */
else else
host->status |= 0x0001; host->status |= 0x0001;
} }
@ -338,32 +338,32 @@ static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size)
} }
switch (offset) { switch (offset) {
case 0x00: /* MMC_CMD */ case 0x00: /* MMC_CMD */
return s->last_cmd; return s->last_cmd;
case 0x04: /* MMC_ARGL */ case 0x04: /* MMC_ARGL */
return s->arg & 0x0000ffff; return s->arg & 0x0000ffff;
case 0x08: /* MMC_ARGH */ case 0x08: /* MMC_ARGH */
return s->arg >> 16; return s->arg >> 16;
case 0x0c: /* MMC_CON */ case 0x0c: /* MMC_CON */
return (s->dw << 15) | (s->mode << 12) | (s->enable << 11) | return (s->dw << 15) | (s->mode << 12) | (s->enable << 11) |
(s->be << 10) | s->clkdiv; (s->be << 10) | s->clkdiv;
case 0x10: /* MMC_STAT */ case 0x10: /* MMC_STAT */
return s->status; return s->status;
case 0x14: /* MMC_IE */ case 0x14: /* MMC_IE */
return s->mask; return s->mask;
case 0x18: /* MMC_CTO */ case 0x18: /* MMC_CTO */
return s->cto; return s->cto;
case 0x1c: /* MMC_DTO */ case 0x1c: /* MMC_DTO */
return s->dto; return s->dto;
case 0x20: /* MMC_DATA */ case 0x20: /* MMC_DATA */
/* TODO: support 8-bit access */ /* TODO: support 8-bit access */
i = s->fifo[s->fifo_start]; i = s->fifo[s->fifo_start];
if (s->fifo_len == 0) { if (s->fifo_len == 0) {
@ -378,42 +378,42 @@ static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size)
omap_mmc_interrupts_update(s); omap_mmc_interrupts_update(s);
return i; return i;
case 0x24: /* MMC_BLEN */ case 0x24: /* MMC_BLEN */
return s->blen_counter; return s->blen_counter;
case 0x28: /* MMC_NBLK */ case 0x28: /* MMC_NBLK */
return s->nblk_counter; return s->nblk_counter;
case 0x2c: /* MMC_BUF */ case 0x2c: /* MMC_BUF */
return (s->rx_dma << 15) | (s->af_level << 8) | return (s->rx_dma << 15) | (s->af_level << 8) |
(s->tx_dma << 7) | s->ae_level; (s->tx_dma << 7) | s->ae_level;
case 0x30: /* MMC_SPI */ case 0x30: /* MMC_SPI */
return 0x0000; return 0x0000;
case 0x34: /* MMC_SDIO */ case 0x34: /* MMC_SDIO */
return (s->cdet_wakeup << 2) | (s->cdet_enable) | s->sdio; return (s->cdet_wakeup << 2) | (s->cdet_enable) | s->sdio;
case 0x38: /* MMC_SYST */ case 0x38: /* MMC_SYST */
return 0x0000; return 0x0000;
case 0x3c: /* MMC_REV */ case 0x3c: /* MMC_REV */
return s->rev; return s->rev;
case 0x40: /* MMC_RSP0 */ case 0x40: /* MMC_RSP0 */
case 0x44: /* MMC_RSP1 */ case 0x44: /* MMC_RSP1 */
case 0x48: /* MMC_RSP2 */ case 0x48: /* MMC_RSP2 */
case 0x4c: /* MMC_RSP3 */ case 0x4c: /* MMC_RSP3 */
case 0x50: /* MMC_RSP4 */ case 0x50: /* MMC_RSP4 */
case 0x54: /* MMC_RSP5 */ case 0x54: /* MMC_RSP5 */
case 0x58: /* MMC_RSP6 */ case 0x58: /* MMC_RSP6 */
case 0x5c: /* MMC_RSP7 */ case 0x5c: /* MMC_RSP7 */
return s->rsp[(offset - 0x40) >> 2]; return s->rsp[(offset - 0x40) >> 2];
/* OMAP2-specific */ /* OMAP2-specific */
case 0x60: /* MMC_IOSR */ case 0x60: /* MMC_IOSR */
case 0x64: /* MMC_SYSC */ case 0x64: /* MMC_SYSC */
return 0; return 0;
case 0x68: /* MMC_SYSS */ case 0x68: /* MMC_SYSS */
return 1; /* RSTD */ return 1; /* RSTD */
} }
OMAP_BAD_REG(offset); OMAP_BAD_REG(offset);
@ -432,7 +432,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
} }
switch (offset) { switch (offset) {
case 0x00: /* MMC_CMD */ case 0x00: /* MMC_CMD */
if (!s->enable) if (!s->enable)
break; break;
@ -447,17 +447,17 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
omap_mmc_update(s); omap_mmc_update(s);
break; break;
case 0x04: /* MMC_ARGL */ case 0x04: /* MMC_ARGL */
s->arg &= 0xffff0000; s->arg &= 0xffff0000;
s->arg |= 0x0000ffff & value; s->arg |= 0x0000ffff & value;
break; break;
case 0x08: /* MMC_ARGH */ case 0x08: /* MMC_ARGH */
s->arg &= 0x0000ffff; s->arg &= 0x0000ffff;
s->arg |= value << 16; s->arg |= value << 16;
break; break;
case 0x0c: /* MMC_CON */ case 0x0c: /* MMC_CON */
s->dw = (value >> 15) & 1; s->dw = (value >> 15) & 1;
s->mode = (value >> 12) & 3; s->mode = (value >> 12) & 3;
s->enable = (value >> 11) & 1; s->enable = (value >> 11) & 1;
@ -477,27 +477,27 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
omap_mmc_pseudo_reset(s); omap_mmc_pseudo_reset(s);
break; break;
case 0x10: /* MMC_STAT */ case 0x10: /* MMC_STAT */
s->status &= ~value; s->status &= ~value;
omap_mmc_interrupts_update(s); omap_mmc_interrupts_update(s);
break; break;
case 0x14: /* MMC_IE */ case 0x14: /* MMC_IE */
s->mask = value & 0x7fff; s->mask = value & 0x7fff;
omap_mmc_interrupts_update(s); omap_mmc_interrupts_update(s);
break; break;
case 0x18: /* MMC_CTO */ case 0x18: /* MMC_CTO */
s->cto = value & 0xff; s->cto = value & 0xff;
if (s->cto > 0xfd && s->rev <= 1) if (s->cto > 0xfd && s->rev <= 1)
printf("MMC: CTO of 0xff and 0xfe cannot be used!\n"); printf("MMC: CTO of 0xff and 0xfe cannot be used!\n");
break; break;
case 0x1c: /* MMC_DTO */ case 0x1c: /* MMC_DTO */
s->dto = value & 0xffff; s->dto = value & 0xffff;
break; break;
case 0x20: /* MMC_DATA */ case 0x20: /* MMC_DATA */
/* TODO: support 8-bit access */ /* TODO: support 8-bit access */
if (s->fifo_len == 32) if (s->fifo_len == 32)
break; break;
@ -508,18 +508,18 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
omap_mmc_interrupts_update(s); omap_mmc_interrupts_update(s);
break; break;
case 0x24: /* MMC_BLEN */ case 0x24: /* MMC_BLEN */
s->blen = (value & 0x07ff) + 1; s->blen = (value & 0x07ff) + 1;
s->blen_counter = s->blen; s->blen_counter = s->blen;
break; break;
case 0x28: /* MMC_NBLK */ case 0x28: /* MMC_NBLK */
s->nblk = (value & 0x07ff) + 1; s->nblk = (value & 0x07ff) + 1;
s->nblk_counter = s->nblk; s->nblk_counter = s->nblk;
s->blen_counter = s->blen; s->blen_counter = s->blen;
break; break;
case 0x2c: /* MMC_BUF */ case 0x2c: /* MMC_BUF */
s->rx_dma = (value >> 15) & 1; s->rx_dma = (value >> 15) & 1;
s->af_level = (value >> 8) & 0x1f; s->af_level = (value >> 8) & 0x1f;
s->tx_dma = (value >> 7) & 1; s->tx_dma = (value >> 7) & 1;
@ -534,38 +534,38 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
break; break;
/* SPI, SDIO and TEST modes unimplemented */ /* SPI, SDIO and TEST modes unimplemented */
case 0x30: /* MMC_SPI (OMAP1 only) */ case 0x30: /* MMC_SPI (OMAP1 only) */
break; break;
case 0x34: /* MMC_SDIO */ case 0x34: /* MMC_SDIO */
s->sdio = value & (s->rev >= 2 ? 0xfbf3 : 0x2020); s->sdio = value & (s->rev >= 2 ? 0xfbf3 : 0x2020);
s->cdet_wakeup = (value >> 9) & 1; s->cdet_wakeup = (value >> 9) & 1;
s->cdet_enable = (value >> 2) & 1; s->cdet_enable = (value >> 2) & 1;
break; break;
case 0x38: /* MMC_SYST */ case 0x38: /* MMC_SYST */
break; break;
case 0x3c: /* MMC_REV */ case 0x3c: /* MMC_REV */
case 0x40: /* MMC_RSP0 */ case 0x40: /* MMC_RSP0 */
case 0x44: /* MMC_RSP1 */ case 0x44: /* MMC_RSP1 */
case 0x48: /* MMC_RSP2 */ case 0x48: /* MMC_RSP2 */
case 0x4c: /* MMC_RSP3 */ case 0x4c: /* MMC_RSP3 */
case 0x50: /* MMC_RSP4 */ case 0x50: /* MMC_RSP4 */
case 0x54: /* MMC_RSP5 */ case 0x54: /* MMC_RSP5 */
case 0x58: /* MMC_RSP6 */ case 0x58: /* MMC_RSP6 */
case 0x5c: /* MMC_RSP7 */ case 0x5c: /* MMC_RSP7 */
OMAP_RO_REG(offset); OMAP_RO_REG(offset);
break; break;
/* OMAP2-specific */ /* OMAP2-specific */
case 0x60: /* MMC_IOSR */ case 0x60: /* MMC_IOSR */
if (value & 0xf) if (value & 0xf)
printf("MMC: SDIO bits used!\n"); printf("MMC: SDIO bits used!\n");
break; break;
case 0x64: /* MMC_SYSC */ case 0x64: /* MMC_SYSC */
if (value & (1 << 2)) /* SRTS */ if (value & (1 << 2)) /* SRTS */
omap_mmc_reset(s); omap_mmc_reset(s);
break; break;
case 0x68: /* MMC_SYSS */ case 0x68: /* MMC_SYSS */
OMAP_RO_REG(offset); OMAP_RO_REG(offset);
break; break;