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https://github.com/Motorhead1991/qemu.git
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memory: add address_space_translate
Using phys_page_find to translate an AddressSpace to a MemoryRegionSection is unwieldy. It requires to pass the page index rather than the address, and later memory_region_section_addr has to be called. Replace memory_region_section_addr with a function that does all of it: call phys_page_find, compute the offset within the region, and check how big the current mapping is. This way, a large flat region can be written with a single lookup rather than a page at a time. address_space_translate will also provide a single point where IOMMU forwarding is implemented. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
parent
b018ddf633
commit
149f54b53b
5 changed files with 131 additions and 130 deletions
192
exec.c
192
exec.c
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@ -182,7 +182,7 @@ static void phys_page_set(AddressSpaceDispatch *d,
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phys_page_set_level(&d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
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}
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MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr index)
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static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr index)
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{
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PhysPageEntry lp = d->phys_map;
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PhysPageEntry *p;
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@ -203,6 +203,25 @@ bool memory_region_is_unassigned(MemoryRegion *mr)
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return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
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&& mr != &io_mem_watch;
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}
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MemoryRegionSection *address_space_translate(AddressSpace *as, hwaddr addr,
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hwaddr *xlat, hwaddr *plen,
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bool is_write)
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{
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MemoryRegionSection *section;
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Int128 diff;
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section = phys_page_find(as->dispatch, addr >> TARGET_PAGE_BITS);
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/* Compute offset within MemoryRegionSection */
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addr -= section->offset_within_address_space;
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/* Compute offset within MemoryRegion */
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*xlat = addr + section->offset_within_region;
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diff = int128_sub(section->mr->size, int128_make64(addr));
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*plen = MIN(int128_get64(diff), *plen);
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return section;
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}
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#endif
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void cpu_exec_init_all(void)
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@ -615,11 +634,11 @@ static int cpu_physical_memory_set_dirty_tracking(int enable)
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}
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hwaddr memory_region_section_get_iotlb(CPUArchState *env,
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MemoryRegionSection *section,
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target_ulong vaddr,
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hwaddr paddr,
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int prot,
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target_ulong *address)
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MemoryRegionSection *section,
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target_ulong vaddr,
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hwaddr paddr, hwaddr xlat,
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int prot,
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target_ulong *address)
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{
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hwaddr iotlb;
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CPUWatchpoint *wp;
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@ -627,7 +646,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
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if (memory_region_is_ram(section->mr)) {
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/* Normal RAM. */
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iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
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+ memory_region_section_addr(section, paddr);
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+ xlat;
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if (!section->readonly) {
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iotlb |= phys_section_notdirty;
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} else {
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@ -635,7 +654,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
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}
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} else {
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iotlb = section - phys_sections;
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iotlb += memory_region_section_addr(section, paddr);
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iotlb += xlat;
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}
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/* Make accesses to pages with watchpoints go via the
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@ -1852,24 +1871,18 @@ static void invalidate_and_set_dirty(hwaddr addr,
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void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
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int len, bool is_write)
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{
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AddressSpaceDispatch *d = as->dispatch;
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int l;
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hwaddr l;
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uint8_t *ptr;
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uint32_t val;
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hwaddr page;
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hwaddr addr1;
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MemoryRegionSection *section;
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while (len > 0) {
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page = addr & TARGET_PAGE_MASK;
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l = (page + TARGET_PAGE_SIZE) - addr;
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if (l > len)
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l = len;
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section = phys_page_find(d, page >> TARGET_PAGE_BITS);
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l = len;
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section = address_space_translate(as, addr, &addr1, &l, is_write);
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if (is_write) {
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if (!memory_region_is_ram(section->mr)) {
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hwaddr addr1;
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addr1 = memory_region_section_addr(section, addr);
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/* XXX: could force cpu_single_env to NULL to avoid
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potential bugs */
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if (l >= 4 && ((addr1 & 3) == 0)) {
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@ -1889,9 +1902,7 @@ void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
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l = 1;
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}
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} else if (!section->readonly) {
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ram_addr_t addr1;
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addr1 = memory_region_get_ram_addr(section->mr)
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+ memory_region_section_addr(section, addr);
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addr1 += memory_region_get_ram_addr(section->mr);
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/* RAM case */
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ptr = qemu_get_ram_ptr(addr1);
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memcpy(ptr, buf, l);
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@ -1900,9 +1911,7 @@ void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
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} else {
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if (!(memory_region_is_ram(section->mr) ||
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memory_region_is_romd(section->mr))) {
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hwaddr addr1;
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/* I/O case */
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addr1 = memory_region_section_addr(section, addr);
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if (l >= 4 && ((addr1 & 3) == 0)) {
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/* 32 bit read access */
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val = io_mem_read(section->mr, addr1, 4);
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@ -1921,9 +1930,7 @@ void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
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}
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} else {
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/* RAM case */
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ptr = qemu_get_ram_ptr(section->mr->ram_addr
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+ memory_region_section_addr(section,
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addr));
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ptr = qemu_get_ram_ptr(section->mr->ram_addr + addr1);
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memcpy(buf, ptr, l);
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}
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}
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@ -1962,26 +1969,21 @@ void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
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void cpu_physical_memory_write_rom(hwaddr addr,
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const uint8_t *buf, int len)
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{
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AddressSpaceDispatch *d = address_space_memory.dispatch;
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int l;
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hwaddr l;
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uint8_t *ptr;
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hwaddr page;
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hwaddr addr1;
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MemoryRegionSection *section;
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while (len > 0) {
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page = addr & TARGET_PAGE_MASK;
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l = (page + TARGET_PAGE_SIZE) - addr;
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if (l > len)
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l = len;
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section = phys_page_find(d, page >> TARGET_PAGE_BITS);
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l = len;
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section = address_space_translate(&address_space_memory,
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addr, &addr1, &l, true);
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if (!(memory_region_is_ram(section->mr) ||
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memory_region_is_romd(section->mr))) {
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/* do nothing */
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} else {
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unsigned long addr1;
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addr1 = memory_region_get_ram_addr(section->mr)
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+ memory_region_section_addr(section, addr);
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addr1 += memory_region_get_ram_addr(section->mr);
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/* ROM/RAM case */
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ptr = qemu_get_ram_ptr(addr1);
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memcpy(ptr, buf, l);
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@ -2051,22 +2053,17 @@ void *address_space_map(AddressSpace *as,
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hwaddr *plen,
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bool is_write)
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{
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AddressSpaceDispatch *d = as->dispatch;
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hwaddr len = *plen;
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hwaddr todo = 0;
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int l;
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hwaddr page;
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hwaddr l, xlat;
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MemoryRegionSection *section;
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ram_addr_t raddr = RAM_ADDR_MAX;
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ram_addr_t rlen;
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void *ret;
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while (len > 0) {
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page = addr & TARGET_PAGE_MASK;
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l = (page + TARGET_PAGE_SIZE) - addr;
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if (l > len)
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l = len;
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section = phys_page_find(d, page >> TARGET_PAGE_BITS);
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l = len;
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section = address_space_translate(as, addr, &xlat, &l, is_write);
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if (!(memory_region_is_ram(section->mr) && !section->readonly)) {
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if (todo || bounce.buffer) {
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@ -2083,8 +2080,11 @@ void *address_space_map(AddressSpace *as,
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return bounce.buffer;
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}
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if (!todo) {
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raddr = memory_region_get_ram_addr(section->mr)
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+ memory_region_section_addr(section, addr);
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raddr = memory_region_get_ram_addr(section->mr) + xlat;
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} else {
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if (memory_region_get_ram_addr(section->mr) + xlat != raddr + todo) {
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break;
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}
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}
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len -= l;
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@ -2150,14 +2150,16 @@ static inline uint32_t ldl_phys_internal(hwaddr addr,
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uint8_t *ptr;
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uint32_t val;
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MemoryRegionSection *section;
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hwaddr l = 4;
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hwaddr addr1;
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section = phys_page_find(address_space_memory.dispatch, addr >> TARGET_PAGE_BITS);
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if (!(memory_region_is_ram(section->mr) ||
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section = address_space_translate(&address_space_memory, addr, &addr1, &l,
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false);
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if (l < 4 ||
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!(memory_region_is_ram(section->mr) ||
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memory_region_is_romd(section->mr))) {
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/* I/O case */
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addr = memory_region_section_addr(section, addr);
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val = io_mem_read(section->mr, addr, 4);
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val = io_mem_read(section->mr, addr1, 4);
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#if defined(TARGET_WORDS_BIGENDIAN)
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if (endian == DEVICE_LITTLE_ENDIAN) {
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val = bswap32(val);
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@ -2171,7 +2173,7 @@ static inline uint32_t ldl_phys_internal(hwaddr addr,
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/* RAM case */
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ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(section->mr)
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& TARGET_PAGE_MASK)
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+ memory_region_section_addr(section, addr));
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+ addr1);
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switch (endian) {
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case DEVICE_LITTLE_ENDIAN:
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val = ldl_le_p(ptr);
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@ -2209,28 +2211,30 @@ static inline uint64_t ldq_phys_internal(hwaddr addr,
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uint8_t *ptr;
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uint64_t val;
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MemoryRegionSection *section;
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hwaddr l = 8;
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hwaddr addr1;
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section = phys_page_find(address_space_memory.dispatch, addr >> TARGET_PAGE_BITS);
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if (!(memory_region_is_ram(section->mr) ||
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section = address_space_translate(&address_space_memory, addr, &addr1, &l,
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false);
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if (l < 8 ||
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!(memory_region_is_ram(section->mr) ||
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memory_region_is_romd(section->mr))) {
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/* I/O case */
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addr = memory_region_section_addr(section, addr);
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/* XXX This is broken when device endian != cpu endian.
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Fix and add "endian" variable check */
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#ifdef TARGET_WORDS_BIGENDIAN
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val = io_mem_read(section->mr, addr, 4) << 32;
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val |= io_mem_read(section->mr, addr + 4, 4);
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val = io_mem_read(section->mr, addr1, 4) << 32;
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val |= io_mem_read(section->mr, addr1 + 4, 4);
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#else
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val = io_mem_read(section->mr, addr, 4);
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val |= io_mem_read(section->mr, addr + 4, 4) << 32;
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val = io_mem_read(section->mr, addr1, 4);
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val |= io_mem_read(section->mr, addr1 + 4, 4) << 32;
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#endif
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} else {
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/* RAM case */
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ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(section->mr)
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& TARGET_PAGE_MASK)
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+ memory_region_section_addr(section, addr));
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+ addr1);
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switch (endian) {
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case DEVICE_LITTLE_ENDIAN:
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val = ldq_le_p(ptr);
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@ -2276,14 +2280,16 @@ static inline uint32_t lduw_phys_internal(hwaddr addr,
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uint8_t *ptr;
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uint64_t val;
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MemoryRegionSection *section;
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hwaddr l = 2;
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hwaddr addr1;
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section = phys_page_find(address_space_memory.dispatch, addr >> TARGET_PAGE_BITS);
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if (!(memory_region_is_ram(section->mr) ||
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section = address_space_translate(&address_space_memory, addr, &addr1, &l,
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false);
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if (l < 2 ||
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!(memory_region_is_ram(section->mr) ||
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memory_region_is_romd(section->mr))) {
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/* I/O case */
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addr = memory_region_section_addr(section, addr);
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val = io_mem_read(section->mr, addr, 2);
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val = io_mem_read(section->mr, addr1, 2);
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#if defined(TARGET_WORDS_BIGENDIAN)
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if (endian == DEVICE_LITTLE_ENDIAN) {
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val = bswap16(val);
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@ -2297,7 +2303,7 @@ static inline uint32_t lduw_phys_internal(hwaddr addr,
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/* RAM case */
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ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(section->mr)
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& TARGET_PAGE_MASK)
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+ memory_region_section_addr(section, addr));
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+ addr1);
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switch (endian) {
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case DEVICE_LITTLE_ENDIAN:
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val = lduw_le_p(ptr);
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@ -2335,19 +2341,18 @@ void stl_phys_notdirty(hwaddr addr, uint32_t val)
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{
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uint8_t *ptr;
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MemoryRegionSection *section;
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hwaddr l = 4;
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hwaddr addr1;
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section = phys_page_find(address_space_memory.dispatch, addr >> TARGET_PAGE_BITS);
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if (!memory_region_is_ram(section->mr) || section->readonly) {
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addr = memory_region_section_addr(section, addr);
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section = address_space_translate(&address_space_memory, addr, &addr1, &l,
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true);
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if (l < 4 || !memory_region_is_ram(section->mr) || section->readonly) {
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if (memory_region_is_ram(section->mr)) {
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section = &phys_sections[phys_section_rom];
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}
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io_mem_write(section->mr, addr, val, 4);
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io_mem_write(section->mr, addr1, val, 4);
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} else {
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unsigned long addr1 = (memory_region_get_ram_addr(section->mr)
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& TARGET_PAGE_MASK)
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+ memory_region_section_addr(section, addr);
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addr1 += memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK;
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ptr = qemu_get_ram_ptr(addr1);
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stl_p(ptr, val);
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@ -2369,11 +2374,12 @@ static inline void stl_phys_internal(hwaddr addr, uint32_t val,
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{
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uint8_t *ptr;
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MemoryRegionSection *section;
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hwaddr l = 4;
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hwaddr addr1;
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section = phys_page_find(address_space_memory.dispatch, addr >> TARGET_PAGE_BITS);
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if (!memory_region_is_ram(section->mr) || section->readonly) {
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addr = memory_region_section_addr(section, addr);
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section = address_space_translate(&address_space_memory, addr, &addr1, &l,
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true);
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if (l < 4 || !memory_region_is_ram(section->mr) || section->readonly) {
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if (memory_region_is_ram(section->mr)) {
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section = &phys_sections[phys_section_rom];
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}
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@ -2386,12 +2392,10 @@ static inline void stl_phys_internal(hwaddr addr, uint32_t val,
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val = bswap32(val);
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}
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#endif
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io_mem_write(section->mr, addr, val, 4);
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io_mem_write(section->mr, addr1, val, 4);
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} else {
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unsigned long addr1;
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addr1 = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
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+ memory_region_section_addr(section, addr);
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/* RAM case */
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addr1 += memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK;
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ptr = qemu_get_ram_ptr(addr1);
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switch (endian) {
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case DEVICE_LITTLE_ENDIAN:
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@ -2436,11 +2440,12 @@ static inline void stw_phys_internal(hwaddr addr, uint32_t val,
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{
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uint8_t *ptr;
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MemoryRegionSection *section;
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hwaddr l = 2;
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hwaddr addr1;
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section = phys_page_find(address_space_memory.dispatch, addr >> TARGET_PAGE_BITS);
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if (!memory_region_is_ram(section->mr) || section->readonly) {
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addr = memory_region_section_addr(section, addr);
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section = address_space_translate(&address_space_memory, addr, &addr1, &l,
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true);
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if (l < 2 || !memory_region_is_ram(section->mr) || section->readonly) {
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if (memory_region_is_ram(section->mr)) {
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section = &phys_sections[phys_section_rom];
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}
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@ -2453,12 +2458,10 @@ static inline void stw_phys_internal(hwaddr addr, uint32_t val,
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val = bswap16(val);
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}
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#endif
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io_mem_write(section->mr, addr, val, 2);
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io_mem_write(section->mr, addr1, val, 2);
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} else {
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unsigned long addr1;
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addr1 = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
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+ memory_region_section_addr(section, addr);
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/* RAM case */
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addr1 += memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK;
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ptr = qemu_get_ram_ptr(addr1);
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switch (endian) {
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case DEVICE_LITTLE_ENDIAN:
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@ -2561,9 +2564,10 @@ bool virtio_is_big_endian(void)
|
|||
bool cpu_physical_memory_is_io(hwaddr phys_addr)
|
||||
{
|
||||
MemoryRegionSection *section;
|
||||
hwaddr l = 1;
|
||||
|
||||
section = phys_page_find(address_space_memory.dispatch,
|
||||
phys_addr >> TARGET_PAGE_BITS);
|
||||
section = address_space_translate(&address_space_memory,
|
||||
phys_addr, &phys_addr, &l, false);
|
||||
|
||||
return !(memory_region_is_ram(section->mr) ||
|
||||
memory_region_is_romd(section->mr));
|
||||
|
|
|
|||
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