target-xtensa: fix gdb register map construction

Due to different gdb overlay organization between windowed/call0
configurations core import script doesn't always work correctly.
Simplify the script: always copy complete gdb register map from overlay,
count registers at core registerstion time. Update existing cores.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2015-07-01 13:00:29 +03:00
parent ddd44279fd
commit 1479073b7e
7 changed files with 27 additions and 7 deletions

View file

@ -28,6 +28,7 @@
#define XTREG(idx, ofs, bi, sz, al, no, flags, cp, typ, grp, name, \
a1, a2, a3, a4, a5, a6) \
{ .targno = (no), .type = (typ), .group = (grp), .size = (sz) },
#define XTREG_END { .targno = -1 },
#ifndef XCHAL_HAVE_DIV32
#define XCHAL_HAVE_DIV32 0
@ -316,6 +317,7 @@
static XtensaConfigList node = { \
.config = &core, \
}; \
xtensa_finalize_config(&core); \
xtensa_register_core(&node); \
}
#else