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tcg: TCGMemOp is now accelerator independent MemOp
Preparation for collapsing the two byte swaps, adjust_endianness and handle_bswap, along the I/O path. Target dependant attributes are conditionalized upon NEED_CPU_H. Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <81d9cd7d7f5aaadfa772d6c48ecee834e9cf7882.1566466906.git.tony.nguyen@bt.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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39 changed files with 418 additions and 396 deletions
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@ -1081,7 +1081,7 @@ QEMU_BUILD_BUG_ON(TLB_MASK_TABLE_OFS(0) < -(1 << 12));
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is in the returned register, maybe %o0. The TLB addend is in %o1. */
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static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index,
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TCGMemOp opc, int which)
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MemOp opc, int which)
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{
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int fast_off = TLB_MASK_TABLE_OFS(mem_index);
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int mask_off = fast_off + offsetof(CPUTLBDescFast, mask);
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@ -1164,7 +1164,7 @@ static const int qemu_st_opc[16] = {
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static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr,
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TCGMemOpIdx oi, bool is_64)
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{
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TCGMemOp memop = get_memop(oi);
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MemOp memop = get_memop(oi);
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#ifdef CONFIG_SOFTMMU
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unsigned memi = get_mmuidx(oi);
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TCGReg addrz, param;
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@ -1246,7 +1246,7 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr,
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static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr,
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TCGMemOpIdx oi)
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{
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TCGMemOp memop = get_memop(oi);
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MemOp memop = get_memop(oi);
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#ifdef CONFIG_SOFTMMU
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unsigned memi = get_mmuidx(oi);
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TCGReg addrz, param;
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