mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-05 00:33:55 -06:00
tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
Replace the separate defines with TCG_TARGET_HAS_extr_i64_i32, so that the two parts of backend-specific type changing cannot be out of sync. Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: <20230822175127.1173698-1-richard.henderson@linaro.org>
This commit is contained in:
parent
bb9d7ee83e
commit
13d885b0ad
13 changed files with 15 additions and 26 deletions
|
@ -152,10 +152,10 @@ DEF(extract2_i64, 1, 2, 1, IMPL64 | IMPL(TCG_TARGET_HAS_extract2_i64))
|
|||
DEF(ext_i32_i64, 1, 1, 0, IMPL64)
|
||||
DEF(extu_i32_i64, 1, 1, 0, IMPL64)
|
||||
DEF(extrl_i64_i32, 1, 1, 0,
|
||||
IMPL(TCG_TARGET_HAS_extrl_i64_i32)
|
||||
IMPL(TCG_TARGET_HAS_extr_i64_i32)
|
||||
| (TCG_TARGET_REG_BITS == 32 ? TCG_OPF_NOT_PRESENT : 0))
|
||||
DEF(extrh_i64_i32, 1, 1, 0,
|
||||
IMPL(TCG_TARGET_HAS_extrh_i64_i32)
|
||||
IMPL(TCG_TARGET_HAS_extr_i64_i32)
|
||||
| (TCG_TARGET_REG_BITS == 32 ? TCG_OPF_NOT_PRESENT : 0))
|
||||
|
||||
DEF(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH | IMPL64)
|
||||
|
|
|
@ -68,8 +68,7 @@ typedef uint64_t TCGRegSet;
|
|||
|
||||
#if TCG_TARGET_REG_BITS == 32
|
||||
/* Turn some undef macros into false macros. */
|
||||
#define TCG_TARGET_HAS_extrl_i64_i32 0
|
||||
#define TCG_TARGET_HAS_extrh_i64_i32 0
|
||||
#define TCG_TARGET_HAS_extr_i64_i32 0
|
||||
#define TCG_TARGET_HAS_div_i64 0
|
||||
#define TCG_TARGET_HAS_rem_i64 0
|
||||
#define TCG_TARGET_HAS_div2_i64 0
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue