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Fixes for NetBSD/alpha:
- Provide a proper PCI-ISA bridge - Set PCI device IDs correctly - Pass -nographic flag to PALcode - Update PALcode to set up the Console Terminal Block - Honor the Floating-point ENable bit during translate. -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmDZ3eAdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV88Zgf/VZd2H9Wm3zUmV8VX u9IlGuG1GROnMA8w+XakKrjKKuRdE/y3tm9vy1cGtYvekrcrHJcQpjouya6hNhWz isqStmRDMiSLZ5kPdrnIaJ3+TOmUcp+ZXdxtsW6iZgO/knOeGFxbeZ35kG/6gmvN AYYegK0vOmCD+Bh9QtlHItDvmCXGQQxWnjlLkRatA0HEoXHLI1r7W3oxCxFF9Hu9 3w/Tvp8rbK7oyVHCVb1ULCTJj4cwl8ZAN/509lUGy9FSZwcLKTi45k0EgAw+yuE8 3HZoON6ZyjvC++cUFJbArJGUEY78QIJWGdtMl1yIJh3V+Jp/shSaKRWSwN7p8kGf QfVa8Q== =XV4L -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-axp-20210628' into staging Fixes for NetBSD/alpha: - Provide a proper PCI-ISA bridge - Set PCI device IDs correctly - Pass -nographic flag to PALcode - Update PALcode to set up the Console Terminal Block - Honor the Floating-point ENable bit during translate. # gpg: Signature made Mon 28 Jun 2021 15:34:08 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-axp-20210628: target/alpha: Honor the FEN bit pc-bios: Update the palcode-clipper image hw/alpha: Provide a PCI-ISA bridge device node hw/alpha: Provide console information to the PALcode at start-up hw/alpha: Set minimum PCI device ID to 1 to match Clipper IRQ mappings Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
13d5f87cc3
7 changed files with 130 additions and 32 deletions
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@ -3,9 +3,7 @@ config DP264
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imply PCI_DEVICES
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imply TEST_DEVICES
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imply E1000_PCI
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select I82374
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select I8254
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select I8259
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select I82378
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select IDE_CMD646
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select MC146818RTC
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select PCI
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@ -10,8 +10,8 @@
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#include "hw/intc/i8259.h"
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PCIBus *typhoon_init(MemoryRegion *, ISABus **, qemu_irq *, AlphaCPU *[4],
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pci_map_irq_fn);
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PCIBus *typhoon_init(MemoryRegion *, qemu_irq *, qemu_irq *, AlphaCPU *[4],
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pci_map_irq_fn, uint8_t devfn_min);
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/* alpha_pci.c. */
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extern const MemoryRegionOps alpha_pci_ignore_ops;
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@ -15,9 +15,7 @@
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#include "qemu/error-report.h"
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#include "hw/rtc/mc146818rtc.h"
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#include "hw/ide/pci.h"
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#include "hw/timer/i8254.h"
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#include "hw/isa/superio.h"
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#include "hw/dma/i8257.h"
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#include "net/net.h"
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#include "qemu/cutils.h"
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#include "qemu/datadir.h"
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@ -58,8 +56,10 @@ static void clipper_init(MachineState *machine)
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AlphaCPU *cpus[4];
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PCIBus *pci_bus;
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PCIDevice *pci_dev;
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DeviceState *i82378_dev;
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ISABus *isa_bus;
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qemu_irq rtc_irq;
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qemu_irq isa_irq;
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long size, i;
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char *palcode_filename;
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uint64_t palcode_entry;
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@ -72,19 +72,57 @@ static void clipper_init(MachineState *machine)
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cpus[i] = ALPHA_CPU(cpu_create(machine->cpu_type));
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}
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/*
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* arg0 -> memory size
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* arg1 -> kernel entry point
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* arg2 -> config word
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*
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* Config word: bits 0-5 -> ncpus
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* bit 6 -> nographics option (for HWRPB CTB)
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*
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* See init_hwrpb() in the PALcode.
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*/
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cpus[0]->env.trap_arg0 = ram_size;
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cpus[0]->env.trap_arg1 = 0;
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cpus[0]->env.trap_arg2 = smp_cpus;
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cpus[0]->env.trap_arg2 = smp_cpus | (!machine->enable_graphics << 6);
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/* Init the chipset. */
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pci_bus = typhoon_init(machine->ram, &isa_bus, &rtc_irq, cpus,
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clipper_pci_map_irq);
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/*
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* Init the chipset. Because we're using CLIPPER IRQ mappings,
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* the minimum PCI device IdSel is 1.
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*/
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pci_bus = typhoon_init(machine->ram, &isa_irq, &rtc_irq, cpus,
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clipper_pci_map_irq, PCI_DEVFN(1, 0));
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/*
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* Init the PCI -> ISA bridge.
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*
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* Technically, PCI-based Alphas shipped with one of three different
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* PCI-ISA bridges:
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*
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* - Intel i82378 SIO
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* - Cypress CY82c693UB
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* - ALI M1533
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*
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* (An Intel i82375 PCI-EISA bridge was also used on some models.)
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*
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* For simplicity, we model an i82378 here, even though it wouldn't
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* have been on any Tsunami/Typhoon systems; it's close enough, and
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* we don't want to deal with modelling the CY82c693UB (which has
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* incompatible edge/level control registers, plus other peripherals
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* like IDE and USB) or the M1533 (which also has IDE and USB).
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*
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* Importantly, we need to provide a PCI device node for it, otherwise
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* some operating systems won't notice there's an ISA bus to configure.
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*/
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i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(7, 0), "i82378"));
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isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
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/* Connect the ISA PIC to the Typhoon IRQ used for ISA interrupts. */
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qdev_connect_gpio_out(i82378_dev, 0, isa_irq);
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/* Since we have an SRM-compatible PALcode, use the SRM epoch. */
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mc146818_rtc_init(isa_bus, 1900, rtc_irq);
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i8254_pit_init(isa_bus, 0x40, 0, NULL);
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/* VGA setup. Don't bother loading the bios. */
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pci_vga_init(pci_bus);
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@ -93,9 +131,6 @@ static void clipper_init(MachineState *machine)
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pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
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}
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/* 2 82C37 (dma) */
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isa_create_simple(isa_bus, "i82374");
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/* Super I/O */
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isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
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@ -814,8 +814,9 @@ static void typhoon_alarm_timer(void *opaque)
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cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER);
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}
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PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
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AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq)
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PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq,
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qemu_irq *p_rtc_irq, AlphaCPU *cpus[4],
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pci_map_irq_fn sys_map_irq, uint8_t devfn_min)
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{
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MemoryRegion *addr_space = get_system_memory();
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DeviceState *dev;
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@ -843,6 +844,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
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}
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}
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*p_isa_irq = qemu_allocate_irq(typhoon_set_isa_irq, s, 0);
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*p_rtc_irq = qemu_allocate_irq(typhoon_set_timer_irq, s, 0);
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/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
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@ -885,7 +887,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
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b = pci_register_root_bus(dev, "pci",
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typhoon_set_irq, sys_map_irq, s,
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&s->pchip.reg_mem, &s->pchip.reg_io,
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0, 64, TYPE_PCI_BUS);
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devfn_min, 64, TYPE_PCI_BUS);
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phb->bus = b;
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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@ -918,18 +920,6 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
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/* Pchip1 PCI I/O, 0x802.FC00.0000, 32MB. */
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/* Pchip1 PCI configuration, 0x802.FE00.0000, 16MB. */
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/* Init the ISA bus. */
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/* ??? Technically there should be a cy82c693ub pci-isa bridge. */
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{
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qemu_irq *isa_irqs;
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*isa_bus = isa_bus_new(NULL, get_system_memory(), &s->pchip.reg_io,
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&error_abort);
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isa_irqs = i8259_init(*isa_bus,
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qemu_allocate_irq(typhoon_set_isa_irq, s, 0));
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isa_bus_irqs(*isa_bus, isa_irqs);
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}
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return b;
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}
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