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mips: Add support for VInt and VEIC irq modes

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Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
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Edgar E. Iglesias 2010-08-06 12:21:16 +02:00 • committed by Edgar E. Iglesias
parent d087bb3e38
commit 138afb024b
3 changed files with 51 additions and 1 deletions
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2
cpu-exec.c
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@ -448,7 +448,7 @@ int cpu_exec(CPUState *env1)
}
#elif defined(TARGET_MIPS)
if ((interrupt_request & CPU_INTERRUPT_HARD) &&
(env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
cpu_mips_hw_interrupts_pending(env) &&
(env->CP0_Status & (1 << CP0St_IE)) &&
!(env->CP0_Status & (1 << CP0St_EXL)) &&
!(env->CP0_Status & (1 << CP0St_ERL)) &&