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physmem: Move TCG IOTLB methods around
The next commit will restrict TCG specific code in physmem.c using some #ifdef'ry. In order to keep it simple, move iotlb_to_section() and memory_region_section_get_iotlb() around close together. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250424202412.91612-11-philmd@linaro.org>
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1 changed files with 25 additions and 25 deletions
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@ -746,6 +746,31 @@ translate_fail:
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return &d->map.sections[PHYS_SECTION_UNASSIGNED];
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}
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MemoryRegionSection *iotlb_to_section(CPUState *cpu,
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hwaddr index, MemTxAttrs attrs)
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{
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int asidx = cpu_asidx_from_attrs(cpu, attrs);
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CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
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AddressSpaceDispatch *d = cpuas->memory_dispatch;
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int section_index = index & ~TARGET_PAGE_MASK;
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MemoryRegionSection *ret;
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assert(section_index < d->map.sections_nb);
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ret = d->map.sections + section_index;
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assert(ret->mr);
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assert(ret->mr->ops);
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return ret;
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}
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/* Called from RCU critical section */
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hwaddr memory_region_section_get_iotlb(CPUState *cpu,
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MemoryRegionSection *section)
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{
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AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
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return section - d->map.sections;
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}
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void cpu_address_space_init(CPUState *cpu, int asidx,
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const char *prefix, MemoryRegion *mr)
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{
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@ -1002,14 +1027,6 @@ bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
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return false;
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}
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/* Called from RCU critical section */
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hwaddr memory_region_section_get_iotlb(CPUState *cpu,
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MemoryRegionSection *section)
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{
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AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
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return section - d->map.sections;
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}
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static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
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uint16_t section);
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static subpage_t *subpage_init(FlatView *fv, hwaddr base);
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@ -2669,23 +2686,6 @@ static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
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return phys_section_add(map, §ion);
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}
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MemoryRegionSection *iotlb_to_section(CPUState *cpu,
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hwaddr index, MemTxAttrs attrs)
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{
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int asidx = cpu_asidx_from_attrs(cpu, attrs);
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CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
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AddressSpaceDispatch *d = cpuas->memory_dispatch;
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int section_index = index & ~TARGET_PAGE_MASK;
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MemoryRegionSection *ret;
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assert(section_index < d->map.sections_nb);
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ret = d->map.sections + section_index;
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assert(ret->mr);
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assert(ret->mr->ops);
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return ret;
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}
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static void io_mem_init(void)
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{
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memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
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