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hw/mem: Stubbed out NPCM7xx Memory Controller model

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This just implements the bare minimum to cause the boot block to skip
memory initialization.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-10-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Havard Skinnemoen 2020-09-10 22:20:56 -07:00 • committed by Peter Maydell
parent c752bb079b
commit 1351f89246
5 changed files with 129 additions and 0 deletions
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6
hw/arm/npcm7xx.c
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@ -43,6 +43,7 @@
#define NPCM7XX_CPUP_BA (0xf03fe000)
#define NPCM7XX_GCR_BA (0xf0800000)
#define NPCM7XX_CLK_BA (0xf0801000)
#define NPCM7XX_MC_BA (0xf0824000)
/* Internal AHB SRAM */
#define NPCM7XX_RAM3_BA (0xc0008000)
@ -186,6 +187,7 @@ static void npcm7xx_init(Object *obj)
TYPE_NPCM7XX_KEY_STORAGE);
object_initialize_child(obj, "otp2", &s->fuse_array,
TYPE_NPCM7XX_FUSE_ARRAY);
object_initialize_child(obj, "mc", &s->mc, TYPE_NPCM7XX_MC);
for (i = 0; i < ARRAY_SIZE(s->tim); i++) {
object_initialize_child(obj, "tim[*]", &s->tim[i], TYPE_NPCM7XX_TIMER);
@ -261,6 +263,10 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->fuse_array), 0, NPCM7XX_OTP2_BA);
npcm7xx_init_fuses(s);
/* Fake Memory Controller (MC). Cannot fail. */
sysbus_realize(SYS_BUS_DEVICE(&s->mc), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->mc), 0, NPCM7XX_MC_BA);
/* Timer Modules (TIM). Cannot fail. */
QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_tim_addr) != ARRAY_SIZE(s->tim));
for (i = 0; i < ARRAY_SIZE(s->tim); i++) {