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hw/sd/sdhci: Introduce a new Write Protected pin inverted property
The Write Protect pin of SDHCI model is default active low to match the SDHCI spec. So, write enable the bit 19 should be 1 and write protected the bit 19 should be 0 at the Present State Register (0x24). However, some boards are design Write Protected pin active high. In other words, write enable the bit 19 should be 0 and write protected the bit 19 should be 1 at the Present State Register (0x24). To support it, introduces a new "wp-inverted" property and set it false by default. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Acked-by: Cédric Le Goater <clg@redhat.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/r/20241114094839.4128404-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
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@ -274,6 +274,10 @@ static void sdhci_set_readonly(DeviceState *dev, bool level)
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{
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SDHCIState *s = (SDHCIState *)dev;
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if (s->wp_inverted) {
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level = !level;
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}
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if (level) {
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s->prnsts &= ~SDHC_WRITE_PROTECT;
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} else {
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@ -1555,6 +1559,8 @@ static const Property sdhci_sysbus_properties[] = {
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false),
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DEFINE_PROP_LINK("dma", SDHCIState,
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dma_mr, TYPE_MEMORY_REGION, MemoryRegion *),
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DEFINE_PROP_BOOL("wp-inverted", SDHCIState,
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wp_inverted, false),
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};
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static void sdhci_sysbus_init(Object *obj)
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