motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-06 01:03:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

qom: Have class_init() take a const data argument

Browse source 
Mechanical change using gsed, then style manually adapted
to pass checkpatch.pl script.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-4-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-02-09 23:47:35 +01:00
parent f1fa787b92
commit 12d1a768bd
1121 changed files with 1774 additions and 1707 deletions
Download patch file Download diff file Expand all files Collapse all files

2
hw/ppc/amigaone.c
View file

@ -173,7 +173,7 @@ static const Property nvram_properties[] = {
DEFINE_PROP_DRIVE("drive", A1NVRAMState, blk),
};
static void nvram_class_init(ObjectClass *oc, void *data)
static void nvram_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);

2
hw/ppc/e500plat.c
View file

@ -68,7 +68,7 @@ HotplugHandler *e500plat_machine_get_hotpug_handler(MachineState *machine,
#define TYPE_E500PLAT_MACHINE MACHINE_TYPE_NAME("ppce500")
static void e500plat_machine_class_init(ObjectClass *oc, void *data)
static void e500plat_machine_class_init(ObjectClass *oc, const void *data)
{
PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);

2
hw/ppc/mac_newworld.c
View file

@ -563,7 +563,7 @@ static int core99_kvm_type(MachineState *machine, const char *arg)
return 2;
}
static void core99_machine_class_init(ObjectClass *oc, void *data)
static void core99_machine_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);

2
hw/ppc/mac_oldworld.c
View file

@ -402,7 +402,7 @@ static int heathrow_kvm_type(MachineState *machine, const char *arg)
return 2;
}
static void heathrow_class_init(ObjectClass *oc, void *data)
static void heathrow_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);

2
hw/ppc/mpc8544ds.c
View file

@ -37,7 +37,7 @@ static void mpc8544ds_init(MachineState *machine)
ppce500_init(machine);
}
static void mpc8544ds_machine_class_init(ObjectClass *oc, void *data)
static void mpc8544ds_machine_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);

2
hw/ppc/pef.c
View file

@ -128,7 +128,7 @@ OBJECT_DEFINE_TYPE_WITH_INTERFACES(PefGuest,
{ TYPE_USER_CREATABLE },
{ NULL })
static void pef_guest_class_init(ObjectClass *oc, void *data)
static void pef_guest_class_init(ObjectClass *oc, const void *data)
{
ConfidentialGuestSupportClass *klass = CONFIDENTIAL_GUEST_SUPPORT_CLASS(oc);

2
hw/ppc/pegasos2.c
View file

@ -588,7 +588,7 @@ static bool pegasos2_setprop(MachineState *ms, const char *path,
return true;
}
static void pegasos2_machine_class_init(ObjectClass *oc, void *data)
static void pegasos2_machine_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc);

25
hw/ppc/pnv.c
View file

@ -1618,7 +1618,7 @@ static uint32_t pnv_chip_power8_xscom_pcba(PnvChip *chip, uint64_t addr)
return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf);
}
static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
static void pnv_chip_power8e_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
@ -1642,7 +1642,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
&k->parent_realize);
}
static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
static void pnv_chip_power8_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
@ -1666,7 +1666,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
&k->parent_realize);
}
static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
static void pnv_chip_power8nvl_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
@ -1954,7 +1954,7 @@ static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, uint64_t addr)
return addr >> 3;
}
static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
static void pnv_chip_power9_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
@ -2302,7 +2302,7 @@ static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)
return addr >> 3;
}
static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
static void pnv_chip_power10_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
@ -2461,7 +2461,7 @@ static const Property pnv_chip_properties[] = {
DEFINE_PROP_BOOL("lpar-per-core", PnvChip, lpar_per_core, false),
};
static void pnv_chip_class_init(ObjectClass *klass, void *data)
static void pnv_chip_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -2724,7 +2724,7 @@ static void pnv_machine_set_hb(Object *obj, bool value, Error **errp)
}
}
static void pnv_machine_power8_class_init(ObjectClass *oc, void *data)
static void pnv_machine_power8_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
@ -2753,7 +2753,7 @@ static void pnv_machine_power8_class_init(ObjectClass *oc, void *data)
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB);
}
static void pnv_machine_power9_class_init(ObjectClass *oc, void *data)
static void pnv_machine_power9_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
XiveFabricClass *xfc = XIVE_FABRIC_CLASS(oc);
@ -2792,7 +2792,7 @@ static void pnv_machine_power9_class_init(ObjectClass *oc, void *data)
"Use 1 LPAR per core mode");
}
static void pnv_machine_p10_common_class_init(ObjectClass *oc, void *data)
static void pnv_machine_p10_common_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
PnvMachineClass *pmc = PNV_MACHINE_CLASS(oc);
@ -2822,7 +2822,7 @@ static void pnv_machine_p10_common_class_init(ObjectClass *oc, void *data)
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB);
}
static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
static void pnv_machine_power10_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@ -2847,7 +2847,8 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
"Use 1 LPAR per core mode");
}
static void pnv_machine_p10_rainier_class_init(ObjectClass *oc, void *data)
static void pnv_machine_p10_rainier_class_init(ObjectClass *oc,
const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
PnvMachineClass *pmc = PNV_MACHINE_CLASS(oc);
@ -2912,7 +2913,7 @@ static void pnv_nmi(NMIState *n, int cpu_index, Error **errp)
}
}
static void pnv_machine_class_init(ObjectClass *oc, void *data)
static void pnv_machine_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);

2
hw/ppc/pnv_adu.c
View file

@ -189,7 +189,7 @@ static const Property pnv_adu_properties[] = {
DEFINE_PROP_LINK("lpc", PnvADU, lpc, TYPE_PNV_LPC, PnvLpcController *),
};
static void pnv_adu_class_init(ObjectClass *klass, void *data)
static void pnv_adu_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

6
hw/ppc/pnv_chiptod.c
View file

@ -456,7 +456,7 @@ static const Property pnv_chiptod_properties[] = {
DEFINE_PROP_LINK("chip", PnvChipTOD , chip, TYPE_PNV_CHIP, PnvChip *),
};
static void pnv_chiptod_power9_class_init(ObjectClass *klass, void *data)
static void pnv_chiptod_power9_class_init(ObjectClass *klass, const void *data)
{
PnvChipTODClass *pctc = PNV_CHIPTOD_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
@ -492,7 +492,7 @@ static int pnv_chiptod_power10_dt_xscom(PnvXScomInterface *dev, void *fdt,
return pnv_chiptod_dt_xscom(dev, fdt, xscom_offset, compat, sizeof(compat));
}
static void pnv_chiptod_power10_class_init(ObjectClass *klass, void *data)
static void pnv_chiptod_power10_class_init(ObjectClass *klass, const void *data)
{
PnvChipTODClass *pctc = PNV_CHIPTOD_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
@ -555,7 +555,7 @@ static void pnv_chiptod_unrealize(DeviceState *dev)
qemu_unregister_reset(pnv_chiptod_reset, chiptod);
}
static void pnv_chiptod_class_init(ObjectClass *klass, void *data)
static void pnv_chiptod_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

14
hw/ppc/pnv_core.c
View file

@ -449,7 +449,7 @@ static const Property pnv_core_properties[] = {
DEFINE_PROP_LINK("chip", PnvCore, chip, TYPE_PNV_CHIP, PnvChip *),
};
static void pnv_core_power8_class_init(ObjectClass *oc, void *data)
static void pnv_core_power8_class_init(ObjectClass *oc, const void *data)
{
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
@ -457,7 +457,7 @@ static void pnv_core_power8_class_init(ObjectClass *oc, void *data)
pcc->xscom_size = PNV_XSCOM_EX_SIZE;
}
static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
static void pnv_core_power9_class_init(ObjectClass *oc, const void *data)
{
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
@ -465,7 +465,7 @@ static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
pcc->xscom_size = PNV_XSCOM_EX_SIZE;
}
static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
static void pnv_core_power10_class_init(ObjectClass *oc, const void *data)
{
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
@ -473,7 +473,7 @@ static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
pcc->xscom_size = PNV10_XSCOM_EC_SIZE;
}
static void pnv_core_class_init(ObjectClass *oc, void *data)
static void pnv_core_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@ -700,7 +700,7 @@ static const Property pnv_quad_properties[] = {
DEFINE_PROP_UINT32("quad-id", PnvQuad, quad_id, 0),
};
static void pnv_quad_power9_class_init(ObjectClass *oc, void *data)
static void pnv_quad_power9_class_init(ObjectClass *oc, const void *data)
{
PnvQuadClass *pqc = PNV_QUAD_CLASS(oc);
DeviceClass *dc = DEVICE_CLASS(oc);
@ -711,7 +711,7 @@ static void pnv_quad_power9_class_init(ObjectClass *oc, void *data)
pqc->xscom_size = PNV9_XSCOM_EQ_SIZE;
}
static void pnv_quad_power10_class_init(ObjectClass *oc, void *data)
static void pnv_quad_power10_class_init(ObjectClass *oc, const void *data)
{
PnvQuadClass *pqc = PNV_QUAD_CLASS(oc);
DeviceClass *dc = DEVICE_CLASS(oc);
@ -725,7 +725,7 @@ static void pnv_quad_power10_class_init(ObjectClass *oc, void *data)
pqc->xscom_qme_size = PNV10_XSCOM_QME_SIZE;
}
static void pnv_quad_class_init(ObjectClass *oc, void *data)
static void pnv_quad_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);

8
hw/ppc/pnv_homer.c
View file

@ -89,7 +89,7 @@ static hwaddr pnv_homer_power8_get_base(PnvChip *chip)
return PNV_HOMER_BASE(chip);
}
static void pnv_homer_power8_class_init(ObjectClass *klass, void *data)
static void pnv_homer_power8_class_init(ObjectClass *klass, const void *data)
{
PnvHomerClass *homer = PNV_HOMER_CLASS(klass);
@ -156,7 +156,7 @@ static hwaddr pnv_homer_power9_get_base(PnvChip *chip)
return PNV9_HOMER_BASE(chip);
}
static void pnv_homer_power9_class_init(ObjectClass *klass, void *data)
static void pnv_homer_power9_class_init(ObjectClass *klass, const void *data)
{
PnvHomerClass *homer = PNV_HOMER_CLASS(klass);
@ -223,7 +223,7 @@ static hwaddr pnv_homer_power10_get_base(PnvChip *chip)
return PNV10_HOMER_BASE(chip);
}
static void pnv_homer_power10_class_init(ObjectClass *klass, void *data)
static void pnv_homer_power10_class_init(ObjectClass *klass, const void *data)
{
PnvHomerClass *homer = PNV_HOMER_CLASS(klass);
@ -266,7 +266,7 @@ static const Property pnv_homer_properties[] = {
DEFINE_PROP_LINK("chip", PnvHomer, chip, TYPE_PNV_CHIP, PnvChip *),
};
static void pnv_homer_class_init(ObjectClass *klass, void *data)
static void pnv_homer_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/pnv_i2c.c
View file

@ -549,7 +549,7 @@ static const Property pnv_i2c_properties[] = {
DEFINE_PROP_UINT32("num-busses", PnvI2C, num_busses, 1),
};
static void pnv_i2c_class_init(ObjectClass *klass, void *data)
static void pnv_i2c_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvXScomInterfaceClass *xscomc = PNV_XSCOM_INTERFACE_CLASS(klass);

8
hw/ppc/pnv_lpc.c
View file

@ -714,7 +714,7 @@ static void pnv_lpc_power8_realize(DeviceState *dev, Error **errp)
PNV_XSCOM_LPC_SIZE);
}
static void pnv_lpc_power8_class_init(ObjectClass *klass, void *data)
static void pnv_lpc_power8_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvXScomInterfaceClass *xdc = PNV_XSCOM_INTERFACE_CLASS(klass);
@ -760,7 +760,7 @@ static void pnv_lpc_power9_realize(DeviceState *dev, Error **errp)
qdev_init_gpio_out_named(dev, lpc->psi_irq_serirq, "SERIRQ", 4);
}
static void pnv_lpc_power9_class_init(ObjectClass *klass, void *data)
static void pnv_lpc_power9_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvLpcClass *plc = PNV_LPC_CLASS(klass);
@ -777,7 +777,7 @@ static const TypeInfo pnv_lpc_power9_info = {
.class_init = pnv_lpc_power9_class_init,
};
static void pnv_lpc_power10_class_init(ObjectClass *klass, void *data)
static void pnv_lpc_power10_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -843,7 +843,7 @@ static const Property pnv_lpc_properties[] = {
DEFINE_PROP_BOOL("psi-serirq", PnvLpcController, psi_has_serirq, false),
};
static void pnv_lpc_class_init(ObjectClass *klass, void *data)
static void pnv_lpc_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/pnv_n1_chiplet.c
View file

@ -136,7 +136,7 @@ static void pnv_n1_chiplet_realize(DeviceState *dev, Error **errp)
PNV10_XSCOM_N1_PB_SCOM_ES_SIZE);
}
static void pnv_n1_chiplet_class_init(ObjectClass *klass, void *data)
static void pnv_n1_chiplet_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/pnv_nest_pervasive.c
View file

@ -181,7 +181,7 @@ static void pnv_nest_pervasive_realize(DeviceState *dev, Error **errp)
PNV10_XSCOM_CHIPLET_CTRL_REGS_SIZE);
}
static void pnv_nest_pervasive_class_init(ObjectClass *klass, void *data)
static void pnv_nest_pervasive_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

8
hw/ppc/pnv_occ.c
View file

@ -172,7 +172,7 @@ const MemoryRegionOps pnv_occ_sram_ops = {
.endianness = DEVICE_BIG_ENDIAN,
};
static void pnv_occ_power8_class_init(ObjectClass *klass, void *data)
static void pnv_occ_power8_class_init(ObjectClass *klass, const void *data)
{
PnvOCCClass *poc = PNV_OCC_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
@ -246,7 +246,7 @@ static const MemoryRegionOps pnv_occ_power9_xscom_ops = {
.endianness = DEVICE_BIG_ENDIAN,
};
static void pnv_occ_power9_class_init(ObjectClass *klass, void *data)
static void pnv_occ_power9_class_init(ObjectClass *klass, const void *data)
{
PnvOCCClass *poc = PNV_OCC_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
@ -266,7 +266,7 @@ static const TypeInfo pnv_occ_power9_type_info = {
.class_init = pnv_occ_power9_class_init,
};
static void pnv_occ_power10_class_init(ObjectClass *klass, void *data)
static void pnv_occ_power10_class_init(ObjectClass *klass, const void *data)
{
PnvOCCClass *poc = PNV_OCC_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
@ -335,7 +335,7 @@ static const Property pnv_occ_properties[] = {
DEFINE_PROP_LINK("homer", PnvOCC, homer, TYPE_PNV_HOMER, PnvHomer *),
};
static void pnv_occ_class_init(ObjectClass *klass, void *data)
static void pnv_occ_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/pnv_pnor.c
View file

@ -119,7 +119,7 @@ static const Property pnv_pnor_properties[] = {
DEFINE_PROP_DRIVE("drive", PnvPnor, blk),
};
static void pnv_pnor_class_init(ObjectClass *klass, void *data)
static void pnv_pnor_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

8
hw/ppc/pnv_psi.c
View file

@ -557,7 +557,7 @@ static const Property pnv_psi_properties[] = {
DEFINE_PROP_UINT64("fsp-bar", PnvPsi, fsp_bar, 0),
};
static void pnv_psi_power8_class_init(ObjectClass *klass, void *data)
static void pnv_psi_power8_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvPsiClass *ppc = PNV_PSI_CLASS(klass);
@ -887,7 +887,7 @@ static void pnv_psi_power9_realize(DeviceState *dev, Error **errp)
pnv_psi_realize(dev, errp);
}
static void pnv_psi_power9_class_init(ObjectClass *klass, void *data)
static void pnv_psi_power9_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvPsiClass *ppc = PNV_PSI_CLASS(klass);
@ -919,7 +919,7 @@ static const TypeInfo pnv_psi_power9_info = {
},
};
static void pnv_psi_power10_class_init(ObjectClass *klass, void *data)
static void pnv_psi_power10_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvPsiClass *ppc = PNV_PSI_CLASS(klass);
@ -939,7 +939,7 @@ static const TypeInfo pnv_psi_power10_info = {
.class_init = pnv_psi_power10_class_init,
};
static void pnv_psi_class_init(ObjectClass *klass, void *data)
static void pnv_psi_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PnvXScomInterfaceClass *xdc = PNV_XSCOM_INTERFACE_CLASS(klass);

6
hw/ppc/pnv_sbe.c
View file

@ -331,7 +331,7 @@ static const MemoryRegionOps pnv_sbe_power9_xscom_mbox_ops = {
.endianness = DEVICE_BIG_ENDIAN,
};
static void pnv_sbe_power9_class_init(ObjectClass *klass, void *data)
static void pnv_sbe_power9_class_init(ObjectClass *klass, const void *data)
{
PnvSBEClass *psc = PNV_SBE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
@ -350,7 +350,7 @@ static const TypeInfo pnv_sbe_power9_type_info = {
.class_init = pnv_sbe_power9_class_init,
};
static void pnv_sbe_power10_class_init(ObjectClass *klass, void *data)
static void pnv_sbe_power10_class_init(ObjectClass *klass, const void *data)
{
PnvSBEClass *psc = PNV_SBE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
@ -386,7 +386,7 @@ static void pnv_sbe_realize(DeviceState *dev, Error **errp)
sbe->timer = timer_new_us(QEMU_CLOCK_VIRTUAL, sbe_timer, sbe);
}
static void pnv_sbe_class_init(ObjectClass *klass, void *data)
static void pnv_sbe_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/ppc440_uc.c
View file

@ -1027,7 +1027,7 @@ static const Property ppc460ex_pcie_props[] = {
PowerPCCPU *),
};
static void ppc460ex_pcie_class_init(ObjectClass *klass, void *data)
static void ppc460ex_pcie_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

8
hw/ppc/ppc4xx_devs.c
View file

@ -236,7 +236,7 @@ static const Property ppc4xx_mal_properties[] = {
DEFINE_PROP_UINT8("rxc-num", Ppc4xxMalState, rxcnum, 0),
};
static void ppc4xx_mal_class_init(ObjectClass *oc, void *data)
static void ppc4xx_mal_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@ -326,7 +326,7 @@ static void ppc405_plb_realize(DeviceState *dev, Error **errp)
ppc4xx_dcr_register(dcr, PLB4A1_ACR, plb, &dcr_read_plb, &dcr_write_plb);
}
static void ppc405_plb_class_init(ObjectClass *oc, void *data)
static void ppc405_plb_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@ -512,7 +512,7 @@ static void ppc405_ebc_realize(DeviceState *dev, Error **errp)
ppc4xx_dcr_register(dcr, EBC0_CFGDATA, ebc, &dcr_read_ebc, &dcr_write_ebc);
}
static void ppc405_ebc_class_init(ObjectClass *oc, void *data)
static void ppc405_ebc_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@ -543,7 +543,7 @@ static const Property ppc4xx_dcr_properties[] = {
PowerPCCPU *),
};
static void ppc4xx_dcr_class_init(ObjectClass *oc, void *data)
static void ppc4xx_dcr_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);

4
hw/ppc/ppc4xx_sdram.c
View file

@ -431,7 +431,7 @@ static const Property ppc4xx_sdram_ddr_props[] = {
DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdrState, nbanks, 4),
};
static void ppc4xx_sdram_ddr_class_init(ObjectClass *oc, void *data)
static void ppc4xx_sdram_ddr_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@ -715,7 +715,7 @@ static const Property ppc4xx_sdram_ddr2_props[] = {
DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdr2State, nbanks, 4),
};
static void ppc4xx_sdram_ddr2_class_init(ObjectClass *oc, void *data)
static void ppc4xx_sdram_ddr2_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);

2
hw/ppc/ppce500_spin.c
View file

@ -175,7 +175,7 @@ static void ppce500_spin_initfn(Object *obj)
sysbus_init_mmio(dev, &s->iomem);
}
static void ppce500_spin_class_init(ObjectClass *klass, void *data)
static void ppce500_spin_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/prep_systemio.c
View file

@ -290,7 +290,7 @@ static const Property prep_systemio_properties[] = {
DEFINE_PROP_UINT8("equipment", PrepSystemIoState, equipment, 0),
};
static void prep_systemio_class_initfn(ObjectClass *klass, void *data)
static void prep_systemio_class_initfn(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/rs6000_mc.c
View file

@ -212,7 +212,7 @@ static const Property rs6000mc_properties[] = {
DEFINE_PROP_BOOL("auto-configure", RS6000MCState, autoconfigure, true),
};
static void rs6000mc_class_initfn(ObjectClass *klass, void *data)
static void rs6000mc_class_initfn(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);

4
hw/ppc/spapr.c
View file

@ -4595,7 +4595,7 @@ static void spapr_cpu_exec_exit(PPCVirtualHypervisor *vhyp, PowerPCCPU *cpu)
}
}
static void spapr_machine_class_init(ObjectClass *oc, void *data)
static void spapr_machine_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
@ -4739,7 +4739,7 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
#define DEFINE_SPAPR_MACHINE_IMPL(latest, ...) \
static void MACHINE_VER_SYM(class_init, spapr, __VA_ARGS__)( \
ObjectClass *oc, \
void *data) \
const void *data) \
{ \
MachineClass *mc = MACHINE_CLASS(oc); \
MACHINE_VER_SYM(class_options, spapr, __VA_ARGS__)(mc); \

2
hw/ppc/spapr_cpu_core.c
View file

@ -373,7 +373,7 @@ static const Property spapr_cpu_core_properties[] = {
DEFINE_PROP_INT32("node-id", SpaprCpuCore, node_id, CPU_UNSET_NUMA_NODE_ID),
};
static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
static void spapr_cpu_core_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);

16
hw/ppc/spapr_drc.c
View file

@ -589,7 +589,7 @@ static void spapr_dr_connector_instance_init(Object *obj)
drc->state = drck->empty_state;
}
static void spapr_dr_connector_class_init(ObjectClass *k, void *data)
static void spapr_dr_connector_class_init(ObjectClass *k, const void *data)
{
DeviceClass *dk = DEVICE_CLASS(k);
@ -665,7 +665,7 @@ static void unrealize_physical(DeviceState *d)
qemu_unregister_reset(drc_physical_reset, drcp);
}
static void spapr_drc_physical_class_init(ObjectClass *k, void *data)
static void spapr_drc_physical_class_init(ObjectClass *k, const void *data)
{
DeviceClass *dk = DEVICE_CLASS(k);
SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
@ -679,7 +679,7 @@ static void spapr_drc_physical_class_init(ObjectClass *k, void *data)
drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
}
static void spapr_drc_logical_class_init(ObjectClass *k, void *data)
static void spapr_drc_logical_class_init(ObjectClass *k, const void *data)
{
SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
@ -690,7 +690,7 @@ static void spapr_drc_logical_class_init(ObjectClass *k, void *data)
drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
}
static void spapr_drc_cpu_class_init(ObjectClass *k, void *data)
static void spapr_drc_cpu_class_init(ObjectClass *k, const void *data)
{
SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
@ -701,7 +701,7 @@ static void spapr_drc_cpu_class_init(ObjectClass *k, void *data)
drck->dt_populate = spapr_core_dt_populate;
}
static void spapr_drc_pci_class_init(ObjectClass *k, void *data)
static void spapr_drc_pci_class_init(ObjectClass *k, const void *data)
{
SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
@ -712,7 +712,7 @@ static void spapr_drc_pci_class_init(ObjectClass *k, void *data)
drck->dt_populate = spapr_pci_dt_populate;
}
static void spapr_drc_lmb_class_init(ObjectClass *k, void *data)
static void spapr_drc_lmb_class_init(ObjectClass *k, const void *data)
{
SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
@ -723,7 +723,7 @@ static void spapr_drc_lmb_class_init(ObjectClass *k, void *data)
drck->dt_populate = spapr_lmb_dt_populate;
}
static void spapr_drc_phb_class_init(ObjectClass *k, void *data)
static void spapr_drc_phb_class_init(ObjectClass *k, const void *data)
{
SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
@ -734,7 +734,7 @@ static void spapr_drc_phb_class_init(ObjectClass *k, void *data)
drck->dt_populate = spapr_phb_dt_populate;
}
static void spapr_drc_pmem_class_init(ObjectClass *k, void *data)
static void spapr_drc_pmem_class_init(ObjectClass *k, const void *data)
{
SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);

5
hw/ppc/spapr_iommu.c
View file

@ -668,7 +668,7 @@ int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
tcet->liobn, 0, tcet->nb_table << tcet->page_shift);
}
static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
static void spapr_tce_table_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = spapr_tce_table_realize;
@ -693,7 +693,8 @@ static const TypeInfo spapr_tce_table_info = {
.class_init = spapr_tce_table_class_init,
};
static void spapr_iommu_memory_region_class_init(ObjectClass *klass, void *data)
static void spapr_iommu_memory_region_class_init(ObjectClass *klass,
const void *data)
{
IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass);

2
hw/ppc/spapr_nvdimm.c
View file

@ -888,7 +888,7 @@ static const Property spapr_nvdimm_properties[] = {
};
#endif
static void spapr_nvdimm_class_init(ObjectClass *oc, void *data)
static void spapr_nvdimm_class_init(ObjectClass *oc, const void *data)
{
NVDIMMClass *nvc = NVDIMM_CLASS(oc);

2
hw/ppc/spapr_pci.c
View file

@ -2173,7 +2173,7 @@ static const char *spapr_phb_root_bus_path(PCIHostState *host_bridge,
return sphb->dtbusname;
}
static void spapr_phb_class_init(ObjectClass *klass, void *data)
static void spapr_phb_class_init(ObjectClass *klass, const void *data)
{
PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/ppc/spapr_rng.c
View file

@ -136,7 +136,7 @@ static const Property spapr_rng_properties[] = {
RngBackend *),
};
static void spapr_rng_class_init(ObjectClass *oc, void *data)
static void spapr_rng_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);

2
hw/ppc/spapr_rtc.c
View file

@ -163,7 +163,7 @@ static const VMStateDescription vmstate_spapr_rtc = {
},
};
static void spapr_rtc_class_init(ObjectClass *oc, void *data)
static void spapr_rtc_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);

2
hw/ppc/spapr_tpm_proxy.c
View file

@ -149,7 +149,7 @@ static const Property spapr_tpm_proxy_properties[] = {
DEFINE_PROP_STRING("host-path", SpaprTpmProxy, host_path),
};
static void spapr_tpm_proxy_class_init(ObjectClass *k, void *data)
static void spapr_tpm_proxy_class_init(ObjectClass *k, const void *data)
{
DeviceClass *dk = DEVICE_CLASS(k);

6
hw/ppc/spapr_vio.c
View file

@ -50,7 +50,7 @@ static char *spapr_vio_get_dev_name(DeviceState *qdev)
return g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
}
static void spapr_vio_bus_class_init(ObjectClass *klass, void *data)
static void spapr_vio_bus_class_init(ObjectClass *klass, const void *data)
{
BusClass *k = BUS_CLASS(klass);
@ -599,7 +599,7 @@ SpaprVioBus *spapr_vio_bus_init(void)
return bus;
}
static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
static void spapr_vio_bridge_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -631,7 +631,7 @@ const VMStateDescription vmstate_spapr_vio = {
},
};
static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
static void vio_spapr_device_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *k = DEVICE_CLASS(klass);
k->realize = spapr_vio_busdev_realize;